# Finite Gain Effects in SC Circuits

## Presentation on theme: "Finite Gain Effects in SC Circuits"— Presentation transcript:

Finite Gain Effects in SC Circuits
Gabor C Temes School of EECS Oregon State University Rev. 03/09/2013

Non-Idealities of an Op-Amp
DC offset voltage Finite dc gain Finite bandwidth Nonzero output impedance Noise 1/8

Model for Finite Gain 2/8

Model for Finite-Gain Effect
∆Qi=Yi(Vi+-Vi-) ∆Q is the charge flow in one clock period. For Ao infinity, ∆Q1=Y1*Vin=-∆Q2=-Y2*Vo So, H(z) = -Y1/Y2 when Ao infinity For finite Ao: ∆Q1=Y1(Vin+Vo/Ao) =-∆Q2=-Y2(Vo+Vo/Ao) H(z) = -Y1/(Y2+Y1/Ao+Y2/Ao) 3/8

Finite Gain Model 4/8

Time Domain Analysis q1(n) = C1[vin(n)-v-(n)]=q2(n)
q2(n)=-C2[vo(n) - v-(n) - vo(n-1)+v-(n-1)] 5/8

Finite D.C. Gain Effects Analysis
C1vin(n) = -C2vo(n)+v-(n)[C1+C2]+C2vo[n-1] – C2v-(n-1) C1vin(n) = -C2[vo(n)-vo(n-1)] - [C1+C2)/A]vo(n)+(C2/A)vo(n-1) C1vin(n) =-C2(1+1/A)[vo(n)-vo(n-1)]+(C1/A)vo(n) (C1/A)vo(n) error is critical. It causes a phase error near dc C2(1+1/A)[vo(n)-vo(n-1)] error is negligible. 6/8

Finite D.C. Gain Effects Analysis
Φ (C1/A)vo(n) error causes a phase error near dc. (C1/A)vo error causes phase error near dc. 7/8

Finite Gain Model vcmi vcmo vin vout 8/8