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**FET Small-Signal Analysis**

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**FET Small-Signal Model**

Transconductance The relationship of VGS (input) to ID (output) is called transconductance. The transconductance is denoted gm. Transfer Curve

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**Graphical Determination of gm**

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**Mathematical Definition of gm**

Using differential calculus Maximum gm at VGS =0V: Effect of ID on gm for

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**Very large to assume input terminal approximate an open circuit**

FET Impedance Input Impedance Zi: Very large to assume input terminal approximate an open circuit Output Impedance Zo: yos: admittance equivalent circuit parameter listed on FET specification sheets.

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FET Specification

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**FET AC Equivalent Circuit**

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**JFET Fixed-Bias Configuration**

The input is on the gate and the output is on the drain.

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**JFET Fixed-Bias Configuration**

Once again: same step as BJT to redraw the network to AC equivalent circuit. Capacitor – short circuit DC batteries VGG and VDD are set to zero volts by a short-circuit equivalent

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AC Equivalent Circuit

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AC Equivalent Circuit

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Impedances Input Impedance: Output Impedance:

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Voltage Gain

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Phase Relationship A CS amplifier configuration has a 180-degree phase shift between input and output.

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**AV ignoring the effects of rd**

Example Fixed-bias configuration has an operating point defined by VGSQ = -2V and IDQ = mA, with IDSS = 10mA and VP = -8V. The value of yos is provided as 40 µS. Determine: gm Zi Zo AV AV ignoring the effects of rd

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Solution

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**JFET CS Self-Bias Configuration**

This is a CS amplifier configuration therefore the input is on the gate and the output is on the drain.

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AC Equivalent Circuit

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Impedances Input Impedance: Output Impedance:

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Voltage Gain

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Phase Relationship A CS amplifier configuration has a 180-degree phase shift between input and output.

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**JFET CS Self-Bias Configuration – Unbypassed Rs**

If Cs is removed, it affects the gain of the circuit.

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AC Equivalent Circuit

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**Impedances Input Impedance: Output Impedance:**

Saat Vi=0, maka dari sisi input Vgs+gmVgsRs =0 atau Vgs+(Io+ID)Rs=0, sehingga Vgs=-(Io+ID)Rs

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Impedances Menghitung Zo didapatkan dengan cara bantuan arus Io, sedangkan untuk penguatan tegangan bantuan arus Io dihilangkan kembali\

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Voltage Gain

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Voltage Gain

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Example

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Solution

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Solution

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**JFET CS Voltage-Divider Configuration**

This is a CS amplifier configuration therefore the input is on the gate and the output is on the drain.

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AC Equivalent Circuit

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Impedances Input Impedance: Output Impedance:

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Voltage Gain

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**JFET Source Follower (Common-Drain) Configuration**

In a CD amplifier configuration the input is on the gate, but the output is from the source.

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AC Equivalent Circuit

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Impedances Input Impedance: Output Impedance:

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Voltage Gain

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Phase Relationship A CD amplifier configuration has no phase shift between input and output.

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**JFET Common-Gate Configuration**

The input is on source and the output is on the drain.

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AC Equivalent Circuit

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Impedances Applying Kirchhoff’s voltage law around the output perimeter and Kirchhoff’s current law at node a ::

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Impedances Input Impedance: Output Impedance:

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Voltage Gain Applying Kirchhoff’s current law at node b ::

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Phase Relationship A CG amplifier configuration has no phase shift between input and output.

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**Depletion-Type MOSFETs**

D-MOSFETs have similar AC equivalent models. The only difference is that VSGQ can be positive for n-channel devices and negative for p-channel devices. This means that gm can be greater than gm0.

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**D-MOSFET AC Equivalent Model**

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**Example Find VGSQ and IDQ Determine gm and compare to gm0 rd**

Find Zi, Zo, Av

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**Enhancement-Type MOSFETs**

There are two types of E-MOSFETs: nMOS or n-channel MOSFETs pMOS or p-channel MOSFETs

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**E-MOSFET AC Equivalent Model**

Forward transfer admittance gm and rd can be found in the specification sheet for the FET.

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**E-MOSFET CS Drain-Feedback Configuration**

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AC Equivalent Circuit

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Impedances Output Impedance: Input Impedance:

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The calculation

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**The AC analysis of E-MOSFET**

Remember that, the biasing arrangement are limited for E-MOSFET

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Voltage Gain

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Phase Relationship This is a CS amplifier configuration therefore it has 180-degree phase shift between input and output.

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Do it Determine input and output and also AV impedance for k=0.3X10-3

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**E-MOSFET CS Voltage-Divider Configuration**

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AC Equivalent Circuit

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Impedances Input Impedance: Output Impedance:

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Voltage Gain

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Phase Relationship This is a CS amplifier configuration therefore it has 180-degree phase shift between input and output.

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Solution

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**E-MOSFET CS Voltage-Divider Configuration**

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AC Equivalent Circuit

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Impedances Input Impedance: [Formula 9.52] Output Impedance: [Formula 9.53] [Formula 9.54]

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Voltage Gain [Formula 9.55] [Formula 9.56]

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Summary Table

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Summary Table

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Try yourself Design a self-bias network that have gain of 10. The device should be biased at VGSQ=1/3VP

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Solution

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To be continued……

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Robert Boylestad Digital Electronics Copyright ©2002 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved. Chapter 9: FET.

Robert Boylestad Digital Electronics Copyright ©2002 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved. Chapter 9: FET.

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