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Syncronous Serial Interface Laboratorio DSP y FPGA ITBA 2010.

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Presentation on theme: "Syncronous Serial Interface Laboratorio DSP y FPGA ITBA 2010."— Presentation transcript:

1 Syncronous Serial Interface Laboratorio DSP y FPGA ITBA 2010

2 Syncronous Serial Interface Modo de funcionamiento configurable: Word Length Shift Direction Clock Frame Sync Interrupciones Modo normal / network

3 Word Length

4 Shift Direction

5 Clock Externo vs Interno Prescaler Sync vs Async –Sync: TX y RX con mismo clock –Async: TX y RX con clocks independientes

6 Clock Gated vs Continuous

7 Diagrama en bloques

8 Frame Sync Word Length Bit Length

9 Double Buffer

10 Interrupciones – DSP56002

11 Puerto C – DSP56002

12

13 Flags

14 Network Mode

15 2 – 32 words / frame Frame Sync indica comienzo de trama Asignación de time slots por soft TSR  desactiva la salida (high-z)

16 Programming sheets

17 Referencias DSP56002 User’s manual


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