1. 1394 Products Overview

2. TSB43AB2xx Integrated 1394a OHCI 1.1 Devices
Features
Benefits
Fully compliant with IEEE Std and IEEE Std 1394a-2000
Provides transmit and receive data at 100M bits/s, 200M bits/s, and 400M bits/s
1.8-V core logic with universal PCI interfaces compatible with 3.3-V and 5-V PCI signaling environments
Interoperability across multiple platforms and peripherals
Support for all peripheral classes
Compliance across most PCI–based systems
Applications
Desktop Computers
Notebook Computers
Embedded Systems
1 ku SRP:
TSB43AB21A = $4.35
TSB43AB22A = $4.55
TSB43AB23 = $4.90
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3. XIO2200 x1 PCI–Express 1394A 2–Port OHCI Link Layer
All PCI Express Product Information is Preliminary and Subject to Change
Features
Benefits
Integrated 2–port 1394a PHY
OHCI 1.1 Compliant
Internal dedicated PCI bus operates at 32-bit, 66 MHz with support for 1 Extended Virtual Channel for Isochronous traffic
Interoperability across multiple platforms and peripherals
Support for all peripheral classes
Higher performance for real–time data applications
Applications
Desktop Computers
Notebook Computers
ExpressCard
1 ku SRP = $18.00
Samples = Now
Production = 3Q05
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4. TSB82AA2 1394B s800 OHCI Link Layer
Features
Benefits
Serial bus data rates of 100, 200, 400, and 800 Mbps
Compliant with Open Host Controller Interface (OHCI) 1.1+ requirements
33-MHz/64-bit and 33-MHz/32-bit selectable PCI 2.3-compliant interface
Only fully compliant s b OHCI Link available
Interoperability across multiple platforms and peripherals
Support for all peripheral classes
Compliance across most PCI–based systems
Applications
Desktop Computers
Notebook Computers
Embedded Systems
1 ku SRP = $7.80
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5. TSB41ABx 1394A Cable PHY Devices
Features
Benefits
Fully Supports Provisions of IEEE Standard for High Performance Serial Bus and IEEE 1394a-2000
Fully Interoperable With FireWire and i.LINK Implementation of IEEE Std 1394
Provides Transmit, Receive Data at 100/200/400 Mbits/s, and Link-Layer Controller Clock at MHz
Interoperability across multiple platforms and peripherals
Support for all Link Layer Controllers featuring standard PHY-LINK Interface
Applications
Storage devices
Consumer Electronics
1 ku SRP:
TSB41AB1 = $1.50
TSB41AB2 = $1.85
TSB41AB3 = $3.00
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6. TSB81BA3 Only fully compliant s800 1394b cable phy available!
Features
Benefits
Compliant with IEEE 1394b-2002, IEEE 1394a-2000 and standards
Backward-compatible, bilingual 1394b cable ports up to 800 Mbps
1394a-2000 cable ports at 100/200/400 Mbps
Interoperable with link layer controllers using 3.3-V supplies and other 1394 PHYs using 1.8-V, 3.3-V, and 5-V supplies
Interoperability across multiple platforms and peripherals
Support for all Link Layer Controllers featuring standard PHY-LINK Interface
Applications
Storage devices
Consumer Electronics
1394B PC Ports
1 ku SRP = $7.80
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7. TSB17BA1 & TSB41BA3A 1394B Long Haul CAT5 XVCR and Phy
Features
Benefits
TSB17BA1
Supports IEEE 1394b-2002 at S100b signaling rates
Drive 1394b signaling across CAT5 cable at 100 Mbps up to 100 meters
TSB41BA3A
Three Bilingual cable ports up to 400 Mbps
1394a-2000 compliant cable ports at 100/200/400 Mbps
Easy Plug and Play network over standard networking cables
Interoperability across multiple platforms and peripherals
Support for all Link Layer Controllers featuring standard PHY-LINK Interface
Applications
Distributed Motor Control
Industrial Sensor Control
Home Networking
1 ku SRP:
TSB17BA1 = $2.50
TSB41BA3A = $6.50
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8. 1394a General–Purpose Link–Layers
Notes:
Each of these 1394A Link Layer Controllers Seamlessly Connect to TI’s 1394a and 1394b Physical Layer Devices.
There is an FPGA–based 1394B General Purpose Link Layer Controller available from Mindready ( one of our Third Party Vendors.
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9. 1394a Consumer Electronic Devices
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10. Technology Overview www.ti.com/1394
General Description: The IEEE 1394 (FireWire™) high-speed interconnection enables simple, low-cost, high-bandwidth real-time data connectivity between computers, peripherals and consumer electronics. Today, all major PC makers provide customers with the option of adding 1394 to both desktop and notebook PCs b is an extension of earlier 1394 technology that enables higher performance (up to 3.2 Gbps), longer distance (up to 100 meters) and a variety of cable media to fit any application (STP, UTP, POF, GOF).
1394b-2002 Advantages
Faster: speeds from 800 Mbps to 3200 Mbps
Longer distances: 100 meters with GOF and Cat5; 50 meters with POF
TI 1394b is bi-lingual: communicates in 1394a and 1394b modes
More cabling options: STP, Cat5, POF, GOF
More efficient: BOSS arbitration
More user-friendly: loop-free build allows any topology and redundancy
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11. What is the Same as 1394a? Logical bus model Peer-to-peer operation
User friendly Ease of Use – Plug and Play
Transaction and addressing models
Asynchronous and Isochronous operation models (QOS)
Power management (with one new mode)
Hybrid Bus Operation
A 1394b port may be implemented as:
Data–strobe port (1394a–only)
Beta–mode only port (1394b–only)
A bilingual portAny mix of 1394 DS & beta ports allowed
Connector keying ensures that incompatible connections cannot physically be made
What “Same” Means
Identical functionality above the LLC
SW can mostly be used as-is
Change required for Self-ID / Speed detection or Bus optimization
Changes needed to use faster rates, larger packets, additional power management modes
LLCs may be used as-is
Changes needed for faster rates, larger packets and more efficient arbitration
PHY Layers MUST change
But may be made 1394a-compatible
Should be Bilingual to connect with millions of existing 1394 devices in market today
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12. (ü) for new gener-ation POF
Better with 1394b
800Mbps available today
3200Mbps specified
Parallel Link/PHY interface can be either:
1394a
up to 8 data lines & 1 clock at 50MHz
1394b
8 data lines & 2 clocks at 100MHz
Longer distance requires new media
Unshielded Twisted Pair CAT5 for S100
Just like 100BASE-T Ethernet
Plastic Optical Fiber (POF) or Hard Polymer Clad Fiber (HPCF) for S200(+?)
S400 has been demonstrated
Multi-mode glass fiber (MMF) for higher speeds
Reach
S100
S200
S400
S800
S1600
S3200
UTP5
100m 
POF/ HPCF
 only 50m for POF
(ü) for new gener-ation POF
MMF
  
  
(ü)  
STP (Beta)
4.5m
(ü)
STP (DS)
Higher speeds defined to 4 Gbps raw
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13. Better with 1394b: Copper STP
New connector needed for higher 1394b data rates
Designed for both CE and PC worlds
Only slightly larger than existing 4-ckt connector
Carries power to support PC peripherals
Keying to ensure compatibility
Beta mode signaling is never used on a Legacy connector
Simplifies backwards compatibility
Two PWB socket variants
Bi-lingual connector
accepts bilingual plug or Beta plug
Beta connector
only accepts Beta plug
Bilingual And Beta Connector Plugs
9 pin
Include power
2 extra pins for signal integrity
One pin reserved for future use
Small size - mating interface 8mm x 5 mm
3 Cables, 4 Sockets
Legacy mode cables (prevents DS to Beta-only connection)
Bilingual to 6-ckt DS (carries power)
Bilingual to 4-ckt DS (no power)
Beta mode cable (also used for bilingual to Beta)
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14. Better with 1394b: More Efficient
New asynchronous arbitration (BOSS)
Overlapped, pipelined arbitration
Asynchronous Performance, taken with TI TSB82AA2 LLC + TI TSB81BA3 + Unibrain SW stack & test application
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15. Implications of Better
Data throughput increase
Throughput bottlenecks
S800 host controller may source/sink 100 MB/s
HDDs may stress throughput
Host System Interface Options
32/33 PCI 133 MB/s max
S800 possible on 32/33 PCI but may limit performance
May not be sufficient for multiple real time streams
64 bit, 66 MHz PCI, or PCI-X
Better choice for supporting higher bandwidth
Raw bit rate increase affects Signal Integrity
62.5MHz to 2GHz with fast rise times
critical etch length
Same story as 1394a, RAMBUS, InfiniBand, USB2.0, DVI, and now 1394b.
Very difficult to “add in” later, must be designed in early
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16. Board layout critical to Signal Integrity
Minimize Disruptions to Twisted Pair Etch Runs
Match Etch Lengths of Each Signal in a Twisted Pair (TP)
Minimize TP Etch length
Match Etch Length Between TPs
Twisted Pair Terminating Resistor Network ACAP to PHY terminals
Ground Plane under TP lines
Request Layout recommendations and examples
Solid Ground Plane Under Signal Layer