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1 Operating Systems Input/Output Management. 2 What is the I/O System A collection of devices that different sub- systems of a computer use to communicate.

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Presentation on theme: "1 Operating Systems Input/Output Management. 2 What is the I/O System A collection of devices that different sub- systems of a computer use to communicate."— Presentation transcript:

1 1 Operating Systems Input/Output Management

2 2 What is the I/O System A collection of devices that different sub- systems of a computer use to communicate with each other. Inputs are the signals received by the device, and outputs are the signals sent from it. Input Device: keyboard, mouse. Output Device: monitor, printer.

3 3 The I/O Bus The CPU communicates with the I/O system by means of an I/O bus. The I/O bus is simply a common set of wires that connect all the I/O devices to the CPU. These wires are used to transmit data, housekeeping signals (such as clock pulses), addresses and instructions. The size or width of a bus is how many bits it carries in parallel. The speed of a bus is how fast it moves data along the path. This is usually measured in MHz.

4 4 I/O Bus Architectures The ISA (Industry Standard Architecture) bus was first introduced in1984. It had a 16-bit width and ran at a speed of 8 MHz. EISA (Extended ISA) was introduced in 1988 as an extension to the ISA standard. It had a 32-bit width but only ran at 8 MHz to be compatible with ISA devices.

5 5 I/O Bus Architectures PCI (Peripheral Component Interconnect) was created in 1993. PCI is available in both a 32 bit version running at 33 MHz and a 64 bit version running at 66 MHz. PCI is currently the standard bus for PCs. AGP (Accelerated Graphics Port) was created in 1997. The first version of AGP, now called AGP 1.0 or AGP 1x, had a 32-bit width and operated at 66 MHz. Newer versions of AGP increase the speed up to 266 MHz. AGP is used only for video controllers.

6 6 How I/O Devices Communicate The O/S sends commands or data to an I/O device by writing to its device registers. The O/S retrieves status or data from an I/O device by reading from its registers. – Remember, registers are like memory storage spaces.

7 7 How I/O Devices Communicate The address which the O/S uses to communicate with an I/O device is called the I/O address or the I/O port. I/O devices use interrupts (IRQs – Interrupt ReQuests) to signal to the CPU that a task has been completed. Interrupts enable I/O devices to operate independently of, and at the same time with the CPU. On ISA buses, data can be sent directly from the I/O controller to memory without the involvement of the CPU. – This is referred to as DMA (Direct Memory Access).

8 8 I/O Addresses If more than one I/O device attempt to use the same I/O address an I/O conflict occurs. This can cause information to get mixed up and overwritten. I/O addresses vary in size, from 4 to 32 bytes.

9 9 I/O Address Assignments Some I/O address assignments in Windows XP Device Manager.

10 10 Interrupts Device interrupts are fed to the processor using an interrupt controller. The interrupt controller has 8 input lines that take requests from one of 8 different devices. The controller then passes the request on to the processor, telling it which device issued the request. Modern PCs have 2 interrupt controllers. The 2 nd controller is cascaded onto the 1 st through input line 2 (IRQ2).

11 11 Interrupts Interrupts 0, 1, 2, 8 and 13 are reserved for internal use, the remainder are used by I/O devices. On an ISA bus when more than one I/O device attempt to use the same interrupt at the same time an interrupt conflict occurs. The CPU is unable to determine which device raised the interrupt. Devices on a PCI bus can share interrupts.

12 12 Interrupts

13 13 Typical Interrupt Usage IRQDefault useIRQDefault use 0System timer8Real-time clock 1Keyboard Controller9Available 2None10Available 3COM211Available 4COM112PS/2 mouse 5Sound card13FPU 6Floppy Disk Controller14Primary IDE channel 7LPT115Secondary IDE channel

14 14 Typical Interrupt Usage Interrupt assignments in Windows XP Device Manager.

15 15 DMA DMA transfers are managed by a DMA controller. A DMA controller has 4 channels, numbered 0 to 3. Most PCs have 2 DMA controllers, with the 1 st controller cascaded to the 2 nd on channel 0. This leaves 7 usable DMA channels. A DMA conflict arises if two I/O devices try to use the same DMA channel at the same time. DMA channel 0 is reserved for system use.

16 16 DMA

17 17 DMA Channel Assignment DMA channel assignment in Windows XP Device Manager.

18 18 Objectives of the I/O System Efficiency – I/O devices must do useful work at the maximum rate. Device independence – programs can access any I/O device without specifying device in advance. Uniform naming – name of I/O device is independent of how the device is manufactured. Error handling – What to do if something goes wrong! – Retransmitting data

19 19 Structure of the I/O System Input-output control system (IOCS) – The part of the O/S that deals with I/O activity. – Performs initial processing and validation on the I/O request from the application and routes it to the appropriate device driver at the next stage. Device Driver – A software module which manages the communication with, and control of, a specific I/O device. – It converts requests from the application to specific commands to the I/O device. – Device drivers are considered to be part of the O/S. – Frequently written in assembly language

20 20 Structure of the I/O System Device Controller – Hardware device that is attached to the I/O bus and provides an interface between the computer and the I/O device. Responsible for sending data to the device in a way the device will understand Application Program Input-output Control System (IOCS) Device Driver Device Controller I/O Device System Calls I/O Bus } Operating System

21 21 I/O Buffering A buffer is an intermediate main memory storage area under the control of the O/S. A buffer holds data in-transit between a process memory area and an I/O device. More than two buffers can be used to let the I/O activity keep up with the CPU processing. – The buffers are organised into a circular queue with data being transferred into the queue at one end and being moved out of the queue at the other.

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