Presentation on theme: "Chapter Three: Interconnection Structure"— Presentation transcript:
1Chapter Three: Interconnection Structure The interconnection structure must support the following types of support:Memory to processor: the CPU reads an instruction or data from memoryProcessor to memory: the CPU write data to memoryI/O to Processor: The CPU reads data from the I/O device via the I/O moduleProcessor to I/O
2Interconnection Structure I/O to or from memory: An I/O module is allowed to change data directly with memory without going through the processor using DMA (Direct Memory Access)
3Interconnection Structure: Bus Interconnection A bus is a communication pathway consisting of lines and, it is connecting two or more devicesA bus is considered as a shared transmission medium allowing multiple devices to connect to itHowever, only one device at a time can successfully transmitSeveral lines of the bus can be used to transmit binary digits simultaneously
4Interconnection Structure: Bus Interconnection For example:An 8-bit unit of data can be transmitted over 8-bus linesA bus that connect the major computer components (CPU, Memory, IO) is called System BusA system bus may consist of 50 to hundreds of separated lines. Each line has a particular function.The Interconnection Structures are based on the use of one or more system buses.
5Interconnection Structure: Bus Interconnection Bus Lines can be classified based on 3 functional groups:
6Interconnection Structure: Bus Interconnection Bus Lines can be classified based on 3 functional groups:1. Data LinesProvide pathway for moving data between system modulesThese lines are called Data BusThe lines (32 to hundreds) referred to as the width of the busThe width determines the overall system performancee.g. If the data bus is 8-bit wide, and each instruction is 16-bit long, then the processor must access the memory module twice during each instruction cycle
7Interconnection Structure: Bus Interconnection 2. Address linesAre used to determine the source or destination of the data on the data bus.For example:The CPU puts the address of the desired word to be read from / or written to memory on the address linesThe width of the address bus determine the maximum addressable memory.The address lines are also used to address I/O portsTypically:
8Interconnection Structure: Bus Interconnection Typically:A higher-order bits are used to select a particular module on the busA lower-order bits are used to select a memory location or I/O port within the moduleFor example: On an 8-bit address busaddress and below might reference locations in memory module (128 words)address and above may refer to devices attached to an I/O modules.
9Interconnection Structure: Bus Interconnection 3. Control LinesAre used to hold control signals to control the access and the use of data and address lines since these lines are shared by all componentscontrol signals transmit command and timing information between system componentsTiming signal indicates the validity of data and adress informationCommand signals specifies the type of operations to be performed
10Interconnection Structure: Bus Interconnection Control lines includes the following operations
11Interconnection Structure: Bus Interconnection Main operations of the BusIf a module wishes to send data to another module it must so two thingsObtain the use of the busTransfer data via the busIf a module wishes to request data from another module it must so two thingsTransfer a request to the other module over appropriate control and address linesWait for the other module to send the data
12Interconnection Structure: Bus Interconnection Typical Bus ArchitectureMetal lines put in printed circuit board, the bus extends across over all the system components