2 Outline Bus components Bus protection techniques CT Saturation Bus arrangementsBus componentsBus protection techniquesCT SaturationApplication Considerations:High impedance bus differential relayingLow impedance bus differential relayingSpecial topics
3 Single bus - single breaker Distribution and lower transmission voltage levelsNo operating flexibilityFault on the bus trips all circuit breakers
4 Multiple bus sections - single breaker with bus tie Distribution and lower transmission voltage levelsLimited operating flexibility
5 Double bus - single breaker with bus tie Transmission and distribution voltage levelsBreaker maintenance without circuit removalFault on a bus disconnects only the circuits being connected to that bus
6 Main and transfer buses Increased operating flexibilityA bus fault requires tripping all breakersTransfer bus for breaker maintenance
7 Double bus – single breaker w/ transfer bus Very high operating flexibilityTransfer bus for breaker maintenance
8 Double bus - double breaker High operating flexibilityLine protection covers bus section between two CTsFault on a bus does not disturb the power to circuits
9 Breaker-and-a-half bus Used on higher voltage levelsMore operating flexibilityRequires more breakersMiddle bus sections covered by line or other equipment protection
10 Ring bus Higher voltage levels High operating flexibility with minimum breakersSeparate bus protection not required at line positions
11 Bus components breakers Low Voltage circuit breakers SF6, EHV & HV - Synchropuff
13 Current Transformers Gas (SF6) insulated current transformer Oil insulated current transformer (35kV up to 800kV)Bushing type (medium voltage switchgear)
14 Protection Requirements High bus fault currents due to large number of circuits connected:CT saturation often becomes a problem as CTs may not be sufficiently rated for worst fault condition caselarge dynamic forces associated with bus faults require fast clearing times in order to reduce equipment damageFalse trip by bus protection may create serious problems:service interruption to a large number of circuits (distribution and sub-transmission voltage levels)system-wide stability problems (transmission voltage levels)With both dependability and security important, preference is always given to securityProtection of power system busbars is one of the most critical relaying applications. Busbars are areas in power systems where fault current levels may be very high. In spite of that, some of the circuits connected to the bus may have their Current Transformers (CTs) insufficiently rated. This creates a danger of significant CT saturation and jeopardizes security of the busbar protection system.A false trip of a distribution bus can cause outages to a large number of customers as numerous feeders and/or sub-transmission lines may get disconnected. A false trip of a transmission busbar may drastically change system topology and jeopardize power system stability. Hence, the requirement of a maximum security of busbar protection.On the other hand, bus faults generate large fault currents. If not cleared promptly, they endanger the entire substation due to both dynamic forces and thermal effects. Hence, the requirement of high-speed operation of busbar protection.With both security and dependability being very important for busbar protection, the preference is always given to security.
15 Bus Protection Techniques Interlocking schemesOvercurrent (“unrestrained” or “unbiased”) differentialOvercurrent percent (“restrained” or “biased”) differentialLinear couplersHigh-impedance bus differential schemesLow-impedance bus differential schemesPower system busbars vary significantly as to the size (number of circuits connected), complexity (number of sections, tie-breakers, disconnectors, etc.) and voltage level (transmission, distribution).The above technical aspects combined with economic factors yield a number of solutions for busbar protection.
16 Interlocking Schemes Blocking scheme typically used Short coordination time requiredCare must be taken with possible saturation of feeder CTsBlocking signal could be sent over communications ports (peer-to-peer)This technique is limited to simple one-incomer distribution busesA simple protection for distribution busbars can be accomplished as an interlocking scheme. Overcurrent (OC) relays are placed on an incoming circuit and at all outgoing feeders. The feeder OCs are set to sense the fault currents on the feeders. The OC on the incoming circuit is set to trip the busbar unless blocked by any of the feeder OC relays. A short coordination timer is typically required to avoid race conditions.When using microprocessor-based multi-functional relays it becomes possible to integrate all the required OC functions in one or few relays. This allows not only reducing wiring but also shortening the coordination time and speeding-up operation of the scheme.Modern relays provide for fast peer-to-peer communications using protocols such as the UCA with the GOOSE mechanism. This allows eliminating wiring and sending the blocking signals over the communications.The scheme although easy to apply and economical is limited to specific (simple) busbar configurations.
17 Overcurrent (unrestrained) Differential Differential signal formed by summation of all currents feeding the busCT ratio matching may be requiredOn external faults, saturated CTs yield spurious differential currentTime delay used to cope with CT saturationInstantaneous differential OC function useful on integrated microprocessor-based relaysTypically a differential current is created externally to a current sensor by summation of all the circuit currents. Preferably the CTs should be of the same ratio. If they are not, a matching CT (or several CTs) is needed. This in turn may increase the burden for the main CTs and make the saturation problem even more serious.Historically, means to deal with the CT saturation problem include definite time or inverse-time overcurrent characteristics.Although economical and applicable to distribution busbars, this solution does not match performance of more advanced schemes and should not be applied to transmission-level busbars.The principle, however, is used as a protection function in an integrated microprocessor-based busbar relay. If this is the case, such unrestrained differential element should be set above the maximum spurious differential current and may give a chance to speed up operation on heavy internal faults as compared to a percent (restrained) bus differential element
18 Linear Couplers ZC = 2 – 20 - typical coil impedance (5V per 1000Amps => 60Hz )If = 8000 A40 V10 V0 V20 V2000 A4000 A0 A59A linear coupler (air core mutual reactor) produces its output voltage proportional to the derivative of the input current. Because they are using air cores, linear couplers do not saturate.During internal faults the sum of the busbar currents, and thus their derivatives, is zero. Based on that, a simple busbar protection is thus achieved by connecting the secondary windings of the linear couplers in series (in order to respond to the sum of the primary currents) and attaching a simple voltage sensor.Disadvantages of this approach are similar to those of the high-impedance schemeExternalFault
19 Linear Couplers Esec= Iprim*Xm - secondary voltage on relay terminals IR= Iprim*Xm /(ZR+ZC) – minimum operating currentwhere,Iprim – primary current in each circuitXm – liner coupler mutual reactance (5V per 1000Amps => 60Hz )ZR – relay tap impedanceZC – sum of all linear coupler self impedancesIf = 8000 AInternal BusFault0 A0 V10 V20 V40 V2000 A4000 A59
20 Linear Couplers Fast, secure and proven Require dedicated air gap CTs, which may not be used for any other protectionCannot be easily applied to reconfigurable busesThe scheme uses a simple voltage detector – it does not provide benefits of a microprocessor-based relay (e.g. oscillography, breaker failure protection, other functions)
21 High Impedance Differential Operating signal created by connecting all CT secondaries in parallelCTs must all have the same ratioMust have dedicated CTsOvervoltage element operates on voltage developed across resistor connected in secondary circuitRequires varistors or AC shorting relays to limit energy during faultsAccuracy dependent on secondary circuit resistanceUsually requires larger CT cables to reduce errors higher costCannot easily be applied to reconfigurable buses and offers no advanced functionality
22 Percent DifferentialPercent characteristic used to cope with CT saturation and other errorsRestraining signal can be formed in a number of waysNo dedicated CTs neededUsed for protection of re-configurable buses possiblePercent differential relays create a restraining signal in addition to the differential signal and apply a percent (restrained) characteristic. The choices of the restraining signal include “sum”, “average” and “maximum” of the bus currents. The choices of the characteristic include typically single-slope and double-slope characteristics.This low-impedance approach does not require dedicated CTs, can tolerate substantial CT saturation and provides for high-speed tripping.Many integrated relays perform CT ratio compensation eliminating the need for matching CTs.This principle became really attractive with the advent of microprocessor-based relays because of the following:Advanced algorithms supplement the percent differential protection function making the relay very secure.Protection of re-configurable busbars becomes easier as the dynamic bus replica (bus image) can be accomplished without switching secondary current circuits.Integrated Breaker Fail (BF) function can provide optimal tripping strategy depending on the actual configuration of a busbar.Distributed architectures are proposed that place Data Acquisition Units (DAU) in bays and replace current wires by fiber optic communications.
23 Low Impedance Percent Differential Individual currents sampled by protection and summated digitallyCT ratio matching done internally (no auxiliary CTs)Dedicated CTs not necessaryAdditional algorithms improve security of percent differential characteristic during CT saturationDynamic bus replica allows application to reconfigurable busesDone digitally with logic to add/remove current inputs from differential computationSwitching of CT secondary circuits not requiredLow secondary burdensAdditional functionality availableDigital oscillography and monitoring of each circuit connected to bus zoneTime-stamped event recordingBreaker failure protection
24 Digital Differential Algorithm Goals Improve the main differential algorithm operationBetter filteringFaster responseBetter restraint techniquesSwitching transient blockingProvide dynamic bus replica for reconfigurable bus barsDependably detect CT saturation in a fast and reliable manner, especially for external faultsImplement additional security to the main differential algorithm to prevent incorrect operationExternal faults with CT saturationCT secondary circuit trouble (e.g. short circuits)
25 Low Impedance Differential (Distributed) Data Acquisition Units (DAUs) installed in baysCentral Processing Unit (CPU) processes all data from DAUsCommunications between DAUs and CPU over fiber using proprietary protocolSampling synchronisation between DAUs is requiredPerceived less reliable (more hardware needed)Difficult to apply in retrofit applications
26 Low Impedance Differential (Centralized) All currents applied to a single central processorNo communications, external sampling synchronisation necessaryPerceived more reliable (less hardware needed)Well suited to both new and retrofit applications.
28 CT Saturation Concepts CT saturation depends on a number of factorsPhysical CT characteristics (size, rating, winding resistance, saturation voltage)Connected CT secondary burden (wires + relays)Primary current magnitude, DC offset (system X/R)Residual flux in CT coreActual CT secondary currents may not behave in the same manner as the ratio (scaled primary) current during faultsEnd result is spurious differential current appearing in the summation of the secondary currents which may cause differential elements to operate if additional security is not applied
29 CT Saturation No DC Offset With DC Offset Waveform remains fairly symmetricalWith DC OffsetWaveform starts off being asymmetrical, then symmetrical in steady state
30 External Fault & Ideal CTs Fault starts at t0Steady-state fault conditions occur at t1Ideal CTs have no saturation or mismatch errors thus produce no differential current
31 External Fault & Actual CTs Fault starts at t0Steady-state fault conditions occur at t1Actual CTs do introduce errors, producing some differential current (without CT saturation)
32 External Fault with CT Saturation Fault starts at t0, CT begins to saturate at t1CT fully saturated at t2CT saturation causes increasing differential current that may enter the differential element operate region.
33 Some Methods of Securing Bus Differential Block the bus differential for a period of time (intentional delay)Increases security as bus zone will not trip when CT saturation is presentPrevents high-speed clearance for internal faults with CT saturation or evolving faultsChange settings of the percent differential characteristic (usually Slope 2)Improves security of differential element by increasing the amount of spurious differential current needed to incorrectly tripDifficult to explicitly develop settings (Is 60% slope enough? Should it be 75%?)Apply directional (phase comparison) supervisionImproves security by requiring all currents flow into the bus zone before asserting the differential elementEasy to implement and testStable even under severe CT saturation during external faults
35 High Impedance Voltage-operated Relay External Fault 59 element set above max possible voltage developed across relay during external fault causing worst case CT saturationFor internal faults, extremely high voltages (well above 59 element pickup) will develop across relay
36 High Impedance Voltage Operated Relay Ratio matching with Multi-ratio CTs Application of high impedance differential relays with CTs of different ratios but ratio matching taps is possible, but could lead to voltage magnification.Voltage developed across full winding of tapped CT does not exceed CT rating, terminal blocks, etc.
37 High Impedance Voltage Operated Relay Ratio matching with Multi-ratio CTs Use of auxiliary CTs to obtain correct ratio matching is also possible, but these CTs must be able to deliver enough voltage necessary to produce relay operation for internal faults.
38 Electromechanical High Impedance Bus Differential Relays Single phase relaysHigh-speedHigh impedance voltage sensingHigh seismic IOC unit
39 P -based High-Impedance Bus Differential Protection Relays Operating time: 20 – I > 1.5xPKP
40 High Impedance Module for Digital Relays RST = 2000 - stabilizing resistor to limit the current through the relay, and force it to the lower impedance CT windings.MOV – Metal Oxide Varistor to limit the voltage to1900 Volts86 – latching contact preventing the resistors from overheating after the fault is detected
42 High Impedance Bus Protection - Summary Fast, secure and provenRequires dedicated CTs, preferably with the same CT ratio and using full tapCan be applied to small busesDepending on bus internal and external fault currents, high impedance bus diff may not provide adequate settings for both sensitivity and securityCannot be easily applied to reconfigurable busesRequire voltage limiting varistor capable of absorbing significant energyMay require auxiliary CTsDo not provide full benefits of microprocessor-based relay system (e.g. metering, monitoring, oscillography, etc.)High-impedance protection responds to a voltage across the differential junction points. The CTs are required to have a low secondary leakage impedance (completely distributed windings or toroidal coils). During external faults, even with severe saturation of some of the CTs, the voltage does not rise above certain level, because the other CTs will provide a lower-impedance path as compared with the relay input impedance. The principle has been used for more than half a century because is robust, secure and fast.The technique, however, is not free from disadvantages. The most important ones are:The high-impedance approach requires dedicated CTs (significant cost associated).It cannot be easily applied to re-configurable buses (current switching using bistable auxiliary relays endangers the CTs, jeopardizes security and adds an extra cost).It requires a voltage limiting varistor capable of absorbing significant energy during busbar faults.The scheme requires only a simple voltage level sensor. From this perspective the high-impedance protection scheme is not a relay. If BF, event recording, oscillography, communications, and other benefits of microprocessor-based relaying are of interest, then extra equipment is needed (such as a Digital Fault Recorder or dedicated BF relays).
44 P-based Low-Impedance Relays No need for dedicated CTsInternal CT ratio mismatch compensationAdvanced algorithms supplement percent differential protection function making the relay very secureDynamic bus replica (bus image) principle is used in protection of reconfigurable bus bars, eliminating the need for switching physically secondary current circuitsIntegrated Breaker Failure (BF) function can provide optimal tripping strategy depending on the actual configuration of a bus barThe low-impedance approach used to be perceived as less secure when compared with the high-impedance protection. This is no longer true as microprocessor-based relays apply sophisticated algorithms to match the performance of high-impedance schemes, and at the same time, the cost considerations make the high-impedance scheme less attractive. This is particularly relevant for large (cost of extra CTs) and complex (dynamic bus replica) buses that cannot be handled well by high-impedance schemes.Microprocessor-based low-impedance busbar relays are developed in one of the two architectures:DistributedCentralized
45 Small Bus Applications 2-8 Circuit ApplicationsUp to 24 Current Inputs4 ZonesZone 1 = Phase AZone 2 = Phase BZone 3 = Phase CZone 4 = Not usedDifferent CT Ratio Capability for Each CircuitLargest CT Primary is Base in Relay
46 Medium to Large Bus Applications 9-12 Circuit ApplicationsRelay Current Inputs4 ZonesZone 1 = Phase A (12 currents)Zone 2 = Phase B (12 currents)Zone 3 = Not usedZone 4 = Not usedRelay Current Inputs4 ZonesZone 1 = Not usedZone 2 = Not usedZone 3 = Phase C (12 currents)Zone 4 = Not usedDifferent CT Ratio Capability for Each CircuitLargest CT Primary is Base in RelayCB 12CB 11
47 Large Bus Applications 87B phase A87B phase B87B phase CLogic relay(switch status,optional BF)
48 Large Bus Applications For buses with up to 24 circuits
49 Summing External Currents Not Recommended for Low-Z 87B relays Relay becomes combination of restrained and unrestrained elementsIn order to parallel CTs:CT performance must be closely matchedAny errors will appear as differential currentsAssociated feeders must be radialNo backfeeds possiblePickup setting must be raised to accommodate any errors
50 Definitions of Restraint Signals “sum of”“scaled sum of”“geometrical average”“maximum of”
51 “Sum Of” vs. “Max Of” Restraint Methods “Sum Of” ApproachMore restraint on external faults; less sensitive for internal faults“Scaled-Sum Of” approach takes into account number of connected circuits and may increase sensitivityBreakpoint settings for the percent differential characteristic more difficult to set“Max Of” ApproachLess restraint on external faults; more sensitive for internal faultsBreakpoint settings for the percent differential characteristic easier to setBetter handles situation where one CT may saturate completely (99% slope settings possible)
52 Bus Differential Adaptive Approach Region 1Low current magnitudesCT saturation possible due to DC offsetCT saturation difficult to detectMore security required Use 2-out-of-2 Operating ModeRegion 2High current magnitudes Quick CT saturation possibleCT saturation easy to detectSecurity required only if CT saturation detectedDynamically decide if 1-out-of-2 or 2-out-of-2 Operating Mode
53 Bus Differential Adaptive Logic Diagram DIFLDIRSATDIFHORAND87B BIASED OP
54 Phase Comparison Principle Internal Faults: All fault (“large”) currents are approximately in phase.External Faults: One fault (“large”) current will be out of phaseSecondary Current of Faulted Circuit (Severe CT Saturation)No Voltages are required or needed
55 Phase Comparison Principle Continued… ImplementationSelect n fault “Contributors”A contributor is a feeder carrying a significant amount of current (above load)A feeder is a contributor if it’s current magnitude is:Above the high breakpoint setting of the bus differential elementAbove a certain portion of the restraint currentDetermine the angle between each Contributor and the sum of the remaining n-1 Contributors.Determine the maximum of the angles and compare with the directional thresholdThreshold is set at 90oFor external faults, the maximum of the angles should be greater than 90oAn angle of more than 90o for an internal fault due to CT saturation is not physically possible.
56 CT Saturation Fault starts at t0, CT begins to saturate at t1 CT fully saturated at t2
57 CT Saturation Detector State Machine NORMALSAT := 0EXTERNALFAULTSAT := 1FAULT & CTSATURATIONThe differentialcharacteristicenteredThe differential-restraining trajectoryout of the differentialcharacteristic forcertain period of timesaturationconditioncurrent below thefirst slope forcertain period oftimeThe CT saturation condition is declared when the magnitude of the restraining signal becomes larger than the higher breakpoint and at the same time the differential current is below the first slope.As the phasor estimator in the main differential algorithm introduces a processing delay that may cause fast CT saturation to be missed, a similar procedure is done using the relations between the signals at the waveform level to catch fast CT saturation. Additionally, the sample-based stage of the saturation detector uses the time derivative of the restraining signal (di/dt) to better trace the saturation pattern shown in the above diagram.The CT saturation condition is of a transient nature and requires a seal-in, therefore the CT saturation detector state machine is used.The saturation detector is capable of detecting saturation occurring in approximately 2 ms into a fault.It should be emphasized that the saturation detector has no dedicated settings, but does rely on settings for the main differential characteristic for proper operation.
58 CT Saturation Detector Operating Principles The 87B SAT flag WILL NOT be set during internal faults, regardless of whether or not any of the CTs saturate.The 87B SAT flag WILL be set during external faults, regardless of whether or not any of the CTs saturate.By design, the 87B SAT flag WILL force the relay to use the additional 87B DIR phase comparison for Region 2The Saturation Detector WILL NOT Block the Operation of the Differential Element – it will only Force 2-out-of-2 Operation
59 CT Saturation Detector - Examples The oscillography records on the next two slides were captured from a B30 relay under test on a real-time digital power system simulatorFirst slide shows an external fault with deep CT saturation (~1.5 msec of good CT performance)SAT saturation detector flag asserts prior to BIASED PKP bus differential pickupDIR directional flag does not assert (one current flows out of zone), so even though bus differential picks up, no trip resultsSecond slide shows an internal fault with mild CT saturationBIASED PKP and BIASED OP both assert before DIR assertsCT saturation does not block bus differentialMore examples available (COMTRADE files) upon request
60 CT Saturation Example – External Fault 0.060.070.080.090.10.110.12-200-150-100-5050100150200time, seccurrent, A~1 msTwo examples of relay operation are presented: an external fault with heavy CT saturation and an internal fault with mild CT saturation.The protected bus includes six circuits connected to CT banks F1, F5, M1, M5, U1 and U5, respectively. The circuits F1, F5, M1, M5 and U5 are capable of feeding some fault current; the U1 circuit supplies a load. The F1, F5 and U5 circuits are significantly stronger than the F5 and M1 connections.The M5 circuit contains the weakest (most prone to saturation) CT of the bus. The Figure presents the bus currents and the most important logic signals for the case of an external fault. Despite very fast and severe CT saturation, the B30 remains stable.Despite heavy CTsaturation theexternal fault currentis seen in theopposite direction
61 CT Saturation – Internal Fault Example The Figure presents the same signals but for the case of an internal fault. The B30 trips in 10 ms (fast form-C output contact).
62 Applying Low-Impedance Differential Relays for Busbar Protection Basic TopicsConfigure physical CT InputsConfigure Bus Zone and Dynamic Bus ReplicaCalculating Bus Differential Element settingsAdvanced TopicsIsolator switch monitoring for reconfigurable busesDifferential Zone CT TroubleIntegrated Breaker Failure protection
63 Configuring CT InputsFor each connected CT circuit enter Primary rating and select Secondary rating.Each 3-phase bank of CT inputs must be assigned to a Signal Source that is used to define the Bus Zone and Dynamic Bus ReplicaFor B30, CTs are connected in 3-phase setsFor B90, CTs are connected as individual single phasesUR hardware is built to support combinations of both 1 A and 5 A secondaries within the same DSP moduleSome relays define 1 p.u. as the maximum primary current of all of the CTs connected in the given Bus Zone
64 Per-Unit Current Definition - Example Current ChannelPrimarySecondaryZoneCT-1F13200 A1 A1CT-2F22400 A5 ACT-3F31200 ACT-4F42CT-5F5CT-6F65000 AFor Zone 1:1.00 ASEC injected on F1 is 1.00 p.u.6.67 ASEC injected on F2 is 1.00 p.u.2.67 ASEC injected on F3 is 1.00 p.u.For Zone 2:1.56 ASEC injected on F4 is 1.00 p.u.20.83 ASEC injected on F5 is 1.00 p.u.5.00 ASEC injected on F6 is 1.00 p.u.For Zone 1, 1 p.u. = 3200 APFor Zone 2, 1 p.u. = 5000 AP
65 Configuration of Bus Zone Dynamic Bus Replica associates a status signal with each current in the Bus Differential ZoneStatus signal can be any logic operandStatus signals can be developed in programmable logic to provide additional checks or security as requiredStatus signal can be set to ‘ON’ if current is always in the bus zone or ‘OFF’ if current is never in the bus zoneCT connections/polarities for a particular bus zone must be properly configured in the relay, via either hardwire or software
66 Configuring the Bus Differential Zone Bus Zone settings defines the boundaries of the Differential Protection and CT Trouble Monitoring.Configure the physical CT InputsCT Primary and Secondary valuesBoth 5 A and 1 A inputs are supported by the UR hardwareRatio compensation done automatically for CT ratio differences up to 32:1Configure AC Signal SourcesConfigure Bus Zone with Dynamic Bus Replica
67 Dual Percent Differential Characteristic High Set (Unrestrained)High SlopeLow SlopeHigh BreakpointLow BreakpointMin Pickup
68 Calculating Bus Differential Settings The following Bus Zone Differential element parameters need to be set:Differential PickupRestraint Low SlopeRestraint Low Break PointRestraint High BreakpointRestraint High SlopeDifferential High Set (if needed)All settings entered in per unit (maximum CT primary in the zone)Slope settings entered in percentLow Slope, High Slope and High Breakpoint settings are used by the CT Saturation Detector and define the Region 1 Area (2-out-of-2 operation with Directional)
69 Calculating Bus Differential Settings – Minimum Pickup Defines the minimum differential current required for operation of the Bus Zone Differential elementMust be set above maximum leakage current not zoned off in the bus differential zoneMay also be set above maximum load conditions for added security in case of CT trouble, but better alternatives exist
70 Calculating Bus Differential Settings – Low Slope Defines the percent bias for the restraint currents from IREST=0 to IREST=Low BreakpointSetting determines the sensitivity of the differential element for low-current internal faultsMust be set above maximum error introduced by the CTs in their normal linear operating modeRange: 15% to 100% in 1%. increments
71 Calculating Bus Differential Settings – Low Breakpoint Defines the upper limit to restraint currents that will be biased according to the Low Slope settingShould be set to be above the maximum load but not more than the maximum current where the CTs still operate linearly (including residual flux)Assumption is that the CTs will be operating linearly (no significant saturation effects up to 80% residual flux) up to the Low Breakpoint setting
72 Calculating Bus Differential Settings – High Breakpoint Defines the minimum restraint currents that will be biased according to the High Slope settingShould be set to be below the minimum current where the weakest CT will saturate with no residual fluxAssumption is that the CTs will be operating linearly (no significant saturation effects up to 80% residual flux) up to the Low Breakpoint setting
73 Calculating Bus Differential Settings – High Slope Defines the percent bias for the restraint currents IRESTHigh BreakpointSetting determines the stability of the differential element for high current external faultsTraditionally, should be set high enough to accommodate the spurious differential current resulting from saturation of the CTs during heavy external faultsSetting can be relaxed in favour of sensitivity and speed as the relay detects CT saturation and applies the directional principle to prevent maloperationRange: 50% to 100% in 1%. increments
74 Calculating Unrestrained Bus Differential Settings Defines the minimum differential current for unrestrained operationShould be set to be above the maximum differential current under worst case CT saturationRange: 2.00 to p.u. in 0.01 p.u. incrementsCan be effectively disabled by setting to p.u.
75 Dual Percent Differential Characteristic High Set (Unrestrained)High SlopeLow SlopeHigh BreakpointLow BreakpointMin Pickup
76 Reconfigurable Buses Protecting re-configurable buses Complex busbars are re-configurable.In particular a given circuit having a single metering point (CT) and single current interrupting device (CB) may be connected to more than one section depending on positions of isolators. This requires to monitor positions of the isolators in order to determine if a given current shall be included in the differential zone for a given section, and whether a given breaker shall be tripped upon detecting a fault in a given zone.This calls for “current switching” (AC) and “trip re-direction logic” (DC). The second operation does not impose any technical difficulties, but the first one is not a preferred solution in analog schemes as it may lead to damaging the CTs. Ability to follow the actual busbar configuration is referred to as a “dynamic bus image” or “dynamic bus replica” and is one of the strongest features of microprocessor-based busbar relays.Protecting re-configurable buses
77 Reconfigurable Buses Protecting re-configurable buses Here, as an example one zone of protection shall cover the NORTH BUS. The figure shows zone boundaries by indicating metering and current interruption points.Protecting re-configurable buses
78 Reconfigurable Buses Protecting re-configurable buses Here, another zone of protection is shown for the SOUTH BUS. The figure shows zone boundaries by indicating metering and current interruption points.Note, for example that a pair of a metering point CT-2 and a current interruption point B-2 belongs to the SOUTH zone only if the S-2 isolator is closed (S-1 is opened). The CT-2 / B-2 point belongs to the NORTH zone if the S-1 is closed (S-2 must be open).Protecting re-configurable buses
79 Reconfigurable Buses Protecting re-configurable buses Ideally, zones shall overlap. This includes protection of the connected circuits as well. In this example, two B30 relays could be used to protect this double-bus arrangement.In reality, there is a physical area between a metering point (CT) and the associated current interruption point (CB). Depending on the mutual location of the two, certain blind or over-tripping spots may occur. This issue can be resolved using dynamic bus replica, and is addressed later in this material.Protecting re-configurable buses
80 IsolatorsReliable “Isolator Closed” signals are needed for the Dynamic Bus ReplicaIn simple applications, a single normally closed contact may be sufficientFor maximum safety:Both N.O. and N.C. contacts should be usedIsolator Alarm should be established and non-valid combinations (open-open, closed-closed) should be sorted outSwitching operations should be inhibited until bus image is recognized with 100% accuracyOptionally block 87B operation from Isolator AlarmEach isolator position signal decides:Whether or not the associated current is to be included in the differential calculationsWhether or not the associated breaker is to be tripped
82 Switch Status Logic and Dyanamic Bus Replica Isolator Open Auxiliary ContactIsolator Closed Auxiliary ContactIsolator PositionAlarmBlock SwitchingOffOnCLOSEDNoLAST VALIDAfter time delay until acknowledgedUntil Isolator Position is validOPENNOTE: Isolator monitoring function may be a built-in feature or user-programmable in low impedance bus differential digital relays
83 Differential Zone CT Trouble Each Bus Differential Zone may a dedicated CT Trouble MonitorDefinite time delay overcurrent element operating on the zone differential current, based on the configured Dynamic Bus ReplicaThree strategies to deal with CT problems:Trip the bus zone as the problem with a CT will likely evolve into a bus fault anywayDo not trip the bus, raise an alarm and try to correct the problem manuallySwitch to setting group with 87B minimum pickup setting above the maximum load current.
84 Differential Zone CT Trouble Strategies 2 and 3 can be accomplished by:Using undervoltage supervision to ride through the period from the beginning of the problem with a CT until declaring a CT trouble conditionUsing an external check zone to supervise the 87B functionUsing CT Trouble to prevent the Bus Differential tripping (2)Using setting groups to increase the pickup value for the 87B function (3)
85 Differential Zone CT Trouble – Strategy #2 Example 87B operatesUndervoltage conditionCT OKCT Trouble operand is used to rise an alarmThe 87B trip is inhibited after CT Trouble element operatesThe relay may misoperate if an external fault occurs after CT trouble but before the CT trouble condition is declared (double-contingency)
86 Example Architecture for Large Busbars Dual (redundant) fiber with 3msec delivery time between neighbouring IEDs. Up to 8 relays in the ringPhase A AC signals and trip contactsPhase B AC signals and trip contactsPhase C AC signals and trip contactsDigital Inputs for isolator monitoring and BF
87 Example Architecture – Dynamic Bus Replica and Isolator Position Phase A AC signals wired here, bus replica configured herePhase B AC signals wired here, bus replica configured herePhase C AC signals wired here, bus replica configured hereAuxuliary switches wired here; Isolator Monitoring function configured hereIsolator Position
88 Example Architecture – BF Initiation & Current Supervision Phase A AC signals wired here, current status monitored herePhase B AC signals wired here, current status monitored herePhase C AC signals wired here, current status monitored hereBreaker Failure elements configured hereBF Initiate & Current Supv.
89 Example Architecture – Breaker Failure Tripping Phase A AC signals wired here, current status monitored hereBreaker Fail OpBreaker Fail OpTripTripPhase B AC signals wired here, current status monitored herePhase C AC signals wired here, current status monitored hereBreaker Fail OpBreaker Fail OpTripBreaker Fail Op command generated here and send to trip appropriate breakers
90 IEEE“Guide for Protective Relay Applications to Power System Buses” is currently being revised by the K14 Working Group of the IEEE Power System Relaying Committee.
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