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C OMPUTER O RGANIZATION AND D ESIGN The Hardware/Software Interface Chapter 2 Instructions: Language of the Computer.

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Presentation on theme: "C OMPUTER O RGANIZATION AND D ESIGN The Hardware/Software Interface Chapter 2 Instructions: Language of the Computer."— Presentation transcript:

1 C OMPUTER O RGANIZATION AND D ESIGN The Hardware/Software Interface Chapter 2 Instructions: Language of the Computer

2 Branch Addressing B-type B 1000 // go to location 10000 ten CB-type CBNZ X19, Exit // go to Exit if X19 != 0 Both addresses are PC-relative Address = PC + offset (from instruction) PC-relative addressing refers to the number of words to the next instruction instead of the number of bytes to stretch the distance of branch, e.g. 19-bit field addresses ±1 MB from the current PC 510000 ten 6 bits26 bits 181Exit 8 bits19 bits 19 5 bits 2

3 Example: Branch offset C code: while (save[i] == k) i += 1; Compiled LEGv8 code: Loop: LSLX10,X22,#3 // Temp reg X10 = i * 8 ADD X10,X10,X25 // X10 = address of save[i] LDUR X9,[X10,#0] // Temp reg X9 = save[i] SUB X11,X9,X24 // X11 = save[i] − k CBNZ X11,Exit // go to Exit if save[i] ≠ k(X11 ≠ 0) ADDI X22,X22,#1 // i = i + 1 B Loop // go to Loop Exit: … 80000 – starting location Machine code 3 80000 1691 0 3 22 10 80004 1112 25 0 10 10 80008 1896 0 0 10 9 80012 1624 24 0 9 11 80016 181 3 11 80020 580 1 22 22 80024 5 −6 80028...

4 Branching Far Away Given a branch on register X19 being equal to register zero, CBZ X19, L1 replace it by a pair of instructions that offers a much greater branching distance. These instructions replace the short-address conditional branch: CBNZ X19, L2 B L1 L2: 4

5 LEGv8 Addressing Mode Summary 5

6 Decoding Machine Language LEGv8 encoding of the opcodes for the LEGv8 machine language 6

7 Decoding Machine code What is the assembly language statement corresponding to the machine instruction 8b0f001? Instruction in binary: 1000 1011 0000 1111 0000 0000 0001 0011 Determine the instruction format First need to find the opcode field. opcode varies from 6 bits to 11 bits depending on the format. Since opcodes must be unique, one way to identify them is to see how many 11- bit opcodes do the shorter opcodes correspond. For example, the branch instruction B use a 6-bit opcode with the value: 00 0101 Measured in 11-bit opcodes, it occupies all the opcode values from 00 0101 00000 to 00 0101 11111 That is, if any 11-bit opcode had a value in that range, such as 00 0101 00100 it would conflict with the 6-bit opcode of branch. 7

8 LEGv8 Encoding Summary Tentative opcode field (11 bits) is then 10001011000, which is 1112 corresponds to ADD in R format shown in table Parse the binary format into fields in R format and decode the rest of the instruction by looking at the field values 8 opcode Rm shamt Rn Rd 10001011000 00101 000000 01111 10000 ADD X16,X15,X5

9 Synchronization Two processors sharing an area of memory P1 writes, then P2 reads Data race if P1 and P2 don’t synchronize Result depends on order of accesses Hardware support required Atomic read/write memory operation No other access to the location allowed between the read and write Synchronization primitive – lock, 0: free and 1: unavailable A processor sets the lock by doing an exchange of 1 with the memory address corresponding to the lock. §2.11 Parallelism and Instructions: Synchronization 9

10 Synchronization in LEGv8 Could be a single instruction E.g., atomic swap of register ↔ memory Or an atomic pair of instructions Load exclusive register: LDXR Store exclusive register: STXR To use: Execute LDXR then STXR with same address If there is an intervening change to the address, store fails (communicated with additional output register) Only use register instruction in between STXR specifies three registers: one to hold the address, one to indicate whether the atomic operation failed or succeeded, and one to hold the value to be stored in memory if it succeeded. 10

11 Synchronization in LEGv8 Example 1: atomic swap (to test/set lock variable) again:LDXR X10,[X20,#0] STXR X23,X9,[X20] // X9 = status CBNZ X9, again ADD X23,XZR,X10 // X23 = loaded value Example 2: lock ADDI X11,XZR,#1 // copy locked value again:LDXR X10,[X20,#0] // read lock CBNZ X10, again // check if it is 0 yet STXR X11, X9, [X20] // attempt to store BNEZ X9,again // branch if store fails Unlock: STUR XZR, [X20,#0]// free lock by writing 0 11

12 Translation and Startup Many compilers produce object modules directly Static linking §2.12 Translating and Starting a Program 12 UNIX follows a suffix convention for files: C source files are named x.c, assembly files are x.s, object files are named x.o, statically linked library routines are x.a, dynamically linked library routes are x.so, and executable files by default are called a.out. MS-DOS uses the suffixes.C,.ASM,.OBJ,.LIB,.DLL, and.EXE to the same effect.

13 Assembler Pseudoinstruction A common variation of assembly language instructions often treated as if it were an instruction in its own right. LEGv8 assembler accepts the following instruction even though it is not found in the LEGv8 machine language: MOV X9,X10 // register X9 gets register X10 The assembler converts this into the machine language: ORR X9,XZR,X10 // register X9 gets 0 OR register X10 The LEGv8 assembler also converts CMP (compare) into a subtract instruction that sets the condition codes and has XZR as the destination. CMP X9,X10 // compare X9 to X10 and set condition codes SUBS XZR,X9,X10 // use X9 − X10 to set condition codes 13

14 Assembler LEGv8 assemblers use hexadecimal in addition to binary and decimal The assembler turns the assembly language program into an object file combination of machine language instructions, data, and information needed to place instructions properly in memory. To produce the binary version of each instruction the assembler must determine the addresses corresponding to all labels. Symbol table keeps track of labels used in branches and data transfer instructions. 14

15 Producing an Object Module Assembler (or compiler) translates program into machine instructions The object file for UNIX systems typically contains six distinct pieces: Header: describes the size and position of the other pieces of the object file Text segment: contains the machine language code Static data segment: data allocated for the life of the program Relocation info: identifies instructions and data words that depend on absolute addresses when the program is loaded into memory Symbol table: global definitions and external references Debug info: concise description of how the modules were compiled for debugger to associate machine instructions with C source files and to make data structures readable. 15

16 Linking Object Modules A linker produces an executable image 1.Merges segments 2.Resolve labels (determine their addresses) 3.Patch location-dependent and external refs Could leave location dependencies for fixing by a relocating loader But with virtual memory, no need to do this Program can be loaded into absolute location in virtual memory space 16

17 Linking example Link the two object files below. Show updated addresses of the first few instructions of the completed executable file. 17 Object file header NameProcedure A Text size100 hex Data size20 hex Text segmentAddressInstruction 0LDUR X0, [X27,#0] 4BL 0 …… Data segment0(X)(X) Relocation informationAddressInstruction typeDependency 0LDURX 4BLB Symbol tableLabelAddress X- B- Procedure A needs to find the address for the variable labeled X to put in the load instruction and to find the address of procedure B to place in the BL instruction.

18 Linking example Procedure B needs the address of the variable labeled Y for the store instruction and the address of procedure A for its BL instruction. 18 Object file header NameProcedure B Text size200 hex Data size30 hex Text segmentAddressInstruction 0STUR X1, [X27,#0] 4BL 0 …… Data segment0(Y)(Y) Relocation informationAddressInstruction typeDependency 0STURY 4BLA Symbol tableLabelAddress Y- A-

19 Linking example From Figure 2.14 on page 108, Text segment starts at address 0000 0000 0040 0000 hex and data segment at 0000 0000 1000 0000 hex. 19 Executable file header Text size300 hex Data Size50 hex Text segmentAddressInstruction 0000 0000 0040 0000 hex LDUR X0, [X27,#0 hex ] 0000 0000 0040 0004 hex BL 000 00FC hex …… 0000 0000 0040 0100 hex STUR X1, [X27,#20 hex ] 0000 0000 0040 0104 hex BL 3FF FEFC hex …… Data segmentAddress 0000 0000 1000 0000 hex (X)(X) …… 0000 0000 1000 0020 hex (Y)(Y) ……

20 Loading a Program Load executable file on disk into memory 1.Read header to determine segment sizes 2.Create virtual address space 3.Copy text and initialized data into memory Or set page table entries so they can be faulted in 4.Set up arguments on stack 5.Initialize registers (including SP, FP) 6.Jump to startup routine Copies arguments to X0, … and calls main When main returns, do exit syscall 20


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