1. CS-EE 481 Spring 2003 1Founder’s Day, 2003 University of Portland School of Engineering CMOS Authorized Entry System Authors Christina Schulz Krissy Smith Morgan Hurliman Nazia Akil Advisor Dr. Hoffbeck, Dr. Osterberg Industry Representative Mr. Dave Dunning Intel Corporation

2. CS-EE 481 Spring 2003 2Founder’s Day, 2003 University of Portland School of Engineering Agenda Introduction Krissy Background Krissy Methods Nazia/Morgan Results Christina Conclusions Christina Demonstration Christina

3. CS-EE 481 Spring 2003 3Founder’s Day, 2003 University of Portland School of Engineering Introduction Acknowledgments What Does It Do? Importance Purpose & Benefits

4. CS-EE 481 Spring 2003 4Founder’s Day, 2003 University of Portland School of Engineering Background History of Hollerith Functionality Key Functional Specifications

5. CS-EE 481 Spring 2003 5Founder’s Day, 2003 University of Portland School of Engineering Methods Integrated Circuits Infrared Systems Analog Systems

6. CS-EE 481 Spring 2003 6Founder’s Day, 2003 University of Portland School of Engineering Integrated Circuits Truth Table B2Logic Schematic Traces.tpr File MOSIS Macro Model

7. CS-EE 481 Spring 2003 7Founder’s Day, 2003 University of Portland School of Engineering Truth Table x + y = z

8. CS-EE 481 Spring 2003 8Founder’s Day, 2003 University of Portland School of Engineering Schematic 8-bit encoder D-Flip Flops Comparators State Machine Test Outputs LED Indicators Card Control Push-buttons IR Input K7 K6 K5 K4 K3 K2 K1 K0 IR0 IR1 IR2 IR3 IR4 IR5 IR6 IR7 IR8 Door

9. CS-EE 481 Spring 2003 9Founder’s Day, 2003 University of Portland School of Engineering CMOS VLSI Chip

10. CS-EE 481 Spring 2003 10Founder’s Day, 2003 University of Portland School of Engineering Macro Model

11. CS-EE 481 Spring 2003 11Founder’s Day, 2003 University of Portland School of Engineering Infrared Systems DC Analysis Logic Thresholds CMOS & TTL Placement Emitter Sensor

12. CS-EE 481 Spring 2003 12Founder’s Day, 2003 University of Portland School of Engineering Voltage Thresholds TTL 0.8V (VIL) 2V (VIH) 5V 0V 1.5V (VIL) 3.5V (VIH) 0V 5V CMOS

13. CS-EE 481 Spring 2003 13Founder’s Day, 2003 University of Portland School of Engineering Infrared Circuit Precision Output Voltage to Chip (CMOS) Card Chip

14. CS-EE 481 Spring 2003 14Founder’s Day, 2003 University of Portland School of Engineering Analog Systems Debounce Circuit Amplifying Circuit LED Circuit

15. CS-EE 481 Spring 2003 15Founder’s Day, 2003 University of Portland School of Engineering Debounce Circuit Rise Time t r = 2 ms (75% of max value) Fall Time t f = 20 ms (25% to min value)

16. CS-EE 481 Spring 2003 16Founder’s Day, 2003 University of Portland School of Engineering Amplifying Circuit Voltage Controlled Current Source (VCCS) Power Resistor Chip Latch

17. CS-EE 481 Spring 2003 17Founder’s Day, 2003 University of Portland School of Engineering LED Circuit Current Voltage Transistor Switch Chip Signal LED +15V NPN 80

18. CS-EE 481 Spring 2003 18Founder’s Day, 2003 University of Portland School of Engineering Integration ID Card Case –Real Estate –User-friendly 40 Pin Connector Door Frame –Electric Strike

19. CS-EE 481 Spring 2003 19Founder’s Day, 2003 University of Portland School of Engineering Front and Back View

20. CS-EE 481 Spring 2003 20Founder’s Day, 2003 University of Portland School of Engineering Results Block Diagram System Diagram CMOS VLSI Chip ID Card Case Programming Pad

21. CS-EE 481 Spring 2003 21Founder’s Day, 2003 University of Portland School of Engineering Block Diagram

22. CS-EE 481 Spring 2003 22Founder’s Day, 2003 University of Portland School of Engineering System Diagram CMOS VLSI Chip Programming Pad 12 9 ID Card IR Device Circuit Debounce Circuit Amplifying Circuit (ID Card Case)

23. CS-EE 481 Spring 2003 23Founder’s Day, 2003 University of Portland School of Engineering CMOS VLSI Chip

24. CS-EE 481 Spring 2003 24Founder’s Day, 2003 University of Portland School of Engineering ID Card Case

25. CS-EE 481 Spring 2003 25Founder’s Day, 2003 University of Portland School of Engineering Programming Pad Inside View Top View

26. CS-EE 481 Spring 2003 26Founder’s Day, 2003 University of Portland School of Engineering Conclusions Wrap-Up Areas For Improvement

27. CS-EE 481 Spring 2003 27Founder’s Day, 2003 University of Portland School of Engineering Demonstration

28. CS-EE 481 Spring 2003 28Founder’s Day, 2003 University of Portland School of Engineering Supplementary Information

29. CS-EE 481 Spring 2003 29Founder’s Day, 2003 University of Portland School of Engineering Milestones NumberDescriptionOriginal 10/25/02 Previous 1/23/03 Present 3/02/03 1Product Pre-Approval09/5/02 09/11/02 2Functional Spec Approval (Product Approval) 10/4/02 3Project Plan Approval10/25/02 4Approval of B 2 Logic Design10/25/0210/30/02 5Calibration of IR Device11/08/0211/18/02 6.tpr File Approval and Send Out 11/27/02 7Parts Ordered12/2/02 8Design Release12/06/02 9TOP’s Approval02/14/03 10Chip Received From MOSIS03/28/03 02/27/03 11Prototype Release04/04/03 12Founder’s Day Presentation04/08/03 13Final Report04/25/0304/18/03

30. CS-EE 481 Spring 2003 30Founder’s Day, 2003 University of Portland School of Engineering Budget