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3. FET ( Field Effect Transistor) 1.Unipolar device i. e. operation depends on only one type of charge carriers (h or e) 2.Voltage controlled Device (gate voltage controls drain current) 3.Very high input impedance (10 9 -10 12 ) 4.Source and drain are interchangeable in most Low-frequency applications 5.Low Voltage Low Current Operation is possible (Low-power consumption) 6.Less Noisy as Compared to BJT 7.No minority carrier storage (Turn off is faster) 8.Self limiting device 9.Very small in size, occupies very small space in ICs 10.Low voltage low current operation is possible in MOSFETS 11.Zero temperature drift of out put is possiblek Few important advantages of FET over conventional Transistors

4. Types of Field Effect Transistors (The Classification) »JFET MOSFET (IGFET) n-Channel JFET p-Channel JFET n-Channel EMOSFET p-Channel EMOSFET Enhancement MOSFET Depletion MOSFET n-Channel DMOSFET p-Channel DMOSFET FET

5. Figure: n-Channel JFET. The Junction Field Effect Transistor (JFET)

6. Gate Drain Source SYMBOLS n-channel JFET Gate Drain Source n-channel JFET Offset-gate symbol Gate Drain Source p-channel JFET

7. Figure: n-Channel JFET and Biasing Circuit. Biasing the JFET

8. Figure: The nonconductive depletion region becomes broader with increased reverse bias. (Note: The two gate regions of each FET are connected to each other.) Operation of JFET at Various Gate Bias Potentials

9. PP + - DC Voltage Source + - + - N N Operation of a JFET Gate Drain Source

10. Figure: Circuit for drain characteristics of the n-channel JFET and its Drain characteristics. Non-saturation (Ohmic) Region: The drain current is given by Where, I DSS is the short circuit drain current, V P is the pinch off voltage Output or Drain (V D -I D ) Characteristics of n-JFET Saturation (or Pinchoff) Region:

11. Figure: n-Channel FET for v GS = 0. Simple Operation and Break down of n-Channel JFET

12. Figure: If v DG exceeds the breakdown voltage V B, drain current increases rapidly. Break Down Region N-Channel JFET Characteristics and Breakdown

13. Figure: Typical drain characteristics of an n-channel JFET. V D -I D Characteristics of EMOS FET Saturation or Pinch off Reg. Locus of pts where

14. Figure: Transfer (or Mutual) Characteristics of n-Channel JFET I DSS V GS (off) =V P Transfer (Mutual) Characteristics of n-Channel JFET

15. JFET Transfer Curve This graph shows the value of I D for a given value of V GS

16. Biasing Circuits used for JFET Fixed bias circuit Self bias circuit Potential Divider bias circuit

17. JFET (n-channel) Biasing Circuits For Self Bias Circuit For Fixed Bias Circuit Applying KVL to gate circuit we get and Where, V p =V GS-off & I DSS is Short ckt. I DS

18. JFET Biasing Circuits Count… or Fixed Bias Ckt.

19. JFET Self (or Source) Bias Circuit This quadratic equation can be solved for V GS & I DS

20. The Potential (Voltage) Divider Bias

21. A Simple CS Amplifier and Variation in I DS with V gs

22. FET Mid-frequency Analysis: A common source (CS) amplifier is shown to the right. The mid-frequency circuit is drawn as follows: the coupling capacitors (C i and C o ) and the bypass capacitor (C SS ) are short circuits short the DC supply voltage (superposition) replace the FET with the hybrid-  model The resulting mid-frequency circuit is shown below.

23. FET Mid-frequency Analysis: A common source (CS) amplifier is shown to the right. The mid-frequency circuit is drawn as follows: the coupling capacitors (C i and C o ) and the bypass capacitor (C SS ) are short circuits short the DC supply voltage (superposition) replace the FET with the hybrid-  model The resulting mid-frequency circuit is shown below.

24. FET Amplifier Configurations and Relationships: Note: The biasing circuit is the same for each amp.

25. Figure: Circuit symbol for an enhancement-mode n-channel MOSFET.

26. Figure: n-Channel Enhancement MOSFET showing channel length L and channel width W.

27. Figure: For v GS < V to the pn junction between drain and body is reverse biased and i D =0.

28. Figure: For v GS >V to a channel of n-type material is induced in the region under the gate. As v GS increases, the channel becomes thicker. For small values of v DS,i D is proportional to v DS. The device behaves as a resistor whose value depends on v GS.

29. Figure: As v DS increases, the channel pinches down at the drain end and i D increases more slowly. Finally for v DS > v GS -V to, i D becomes constant.

30. Current-Voltage Relationship of n-EMOSFET Locus of points where

31. Figure: Drain characteristics

32. Figure: This circuit can be used to plot drain characteristics.

33. Figure: Diodes protect the oxide layer from destruction by static electric charge.

34. Figure: Simple NMOS amplifier circuit and Characteristics with load line.

35. Figure: Drain characteristics and load line

36. Figure Fixed- plus self-bias circuit.

37. Figure The more nearly horizontal bias line results in less change in the Q-point.

38. Figure Small-signal equivalent circuit for FETs.

39. Figure FET small-signal equivalent circuit that accounts for the dependence of i D on v DS.

40. Figure Common-source amplifier.

41. An Amplifier Circuit using MOSFET(CS Amp.)

42. Figure Small-signal equivalent circuit for the common-source amplifier. A small signal equivalent circuit of CS Amp.

43. Figure Small-signal ac equivalent circuit for the source follower.

44. Figure Equivalent circuit used to find the output resistance of the source follower.

45. Figure Drain current versus drain-to-source voltage for zero gate-to-source voltage.

46. Figure n-Channel depletion MOSFET.

47. Figure Characteristic curves for an NMOS transistor.

48. Figure Drain current versus v GS in the saturation region for n-channel devices.

49. Figure p-Channel FET circuit symbols. These are the same as the circuit symbols for n-channel devices, except for the directions of the arrowheads.

50. Figure Drain current versus v GS for several types of FETs. i D is referenced into the drain terminal for n-channel devices and out of the drain for p-channel devices.