1. 1 | © 2016 Infinera Copyright 3D: Future Transport Network Architectures

2. 2 | © 2016 Infinera Copyright Introduction to Transport SDN Geoff Bennett: Director, Solutions and Technology

3. 3 | © 2016 Infinera Copyright What is “Software Defined Networking”? “Hardware defined networking” Traffic paths determined by distributed control plane located in each hardware element Software Defined Networking Traffic paths determined by centralized control plane function located in an appliance, or VNF

4. 4 | © 2016 Infinera Copyright What is “Transport SDN” ?  SDN architecture & protocols applied to the Transport Network What is the Transport Network? How has routing architecture evolved? How has transport architecture evolved? Are routers even part of the Transport Network?

5. 5 | © 2016 Infinera Copyright Transport SDN: SDN for Transport Networks Multi-Layer, End to End Service Provisioning 1 Inter-Domain Service Provisioning 2 Customer control of network resources 3 Router optimization 4

6. 6 | © 2016 Infinera Copyright... n x 100GbE n x Terabit fiber capacity The Internet and the Transport Network Router Network (aka “Internet”) Transport Network Some of Infinera’s products

7. 7 | © 2016 Infinera Copyright The Move to Transport SDN Router Network (aka “Internet”) Transport Network Disaggregate? What does “end to end” look like?

8. 8 | © 2016 Infinera Copyright Router Network (aka “Internet”) Transport Network Part 1 Disaggregation in the packet layer

9. 9 | © 2016 Infinera Copyright 1988 Fast Path Switching Pre-1988 Process Switching A Simplified Timeline of Router Evolution... 1995 MPLS Label Switching SDN Disaggregation “Today” Routing ASICs “off the shelf” NFV

10. 10 | © 2016 Infinera Copyright TCAM*RAM Buffer DRAM Traffic Manager PHY CPU DRAM Media Network Processor Interface (Linecard) Basic Router Forwarding Architecture Adapted from Greg Hankins NANOG Presentation: “PUSHING THE LIMITS, A PERSPECTIVE ON ROUTER ARCHITECTURE CHALLENGES” CPU DRAM Management Interconnect CPU Card Fabric Card...... Backplane Queue management memory Packet lookup memory

11. 11 | © 2016 Infinera Copyright Lookup Memory Low High Buffer Memory LowHigh Optimizing Router Price/Performance: Memory vs Function Core LSR Metro Packet Optical Core Packet Optical Core Router Edge Router Access Router Edge LSR  Needs lots of buffers Any device that will be doing a lot of queue management and aggregation of low speed links into over-subscribed higher speed link(s) Devices that offer protection via statistical multiplexing  Need lots of lookup memory Any device exposed to a full internet routing table (MPLS FRR) (L3 Protection)

12. 12 | © 2016 Infinera Copyright The Software ChallengeThe Hardware Challenge Routing Disaggregation Challenges Routing ASIC off the shelf Lookup memory optimization Buffer memory optimization Fabric optimization “Speeds and feeds” support Engineering Optimization Routing Protocols (OSPF, ISIS, BGP) MPLS Label Distribution or signaling protocols (LDP, RSVP-TE) Centralized Controller OpenSource Leverage

13. 13 | © 2016 Infinera Copyright The Benefits of Disaggregated Routing SDN NFV The Data Plane Leverage commodity ASICs “Rightsize” the forwarding H/W Lower H/W Cost The Control Plane Rapid feature development Multi-layer orchestration Customer-driven service portals Lower S/W maintenance costs Improved service response

14. 14 | © 2016 Infinera Copyright Router Network (aka “Internet”) Transport Network Part 2 Disaggregation in the transport layer

15. 15 | © 2016 Infinera Copyright The Long Haul Challenge of Operational Scale Time Demand 40% CAGR For 5 years = 5X Can anyone afford to hire 5X engineers? How is the industry approaching this problem of operational scale?

16. 16 | © 2016 Infinera Copyright Operational Scale: The Industry Approach *But only by losing 80% of the optical reach with 16QAM We’re already halfway through this decade, but the “best” the industry can do is just 200Gb/s per wavelength* 4x >30x* * Capacity x reach product

17. 17 | © 2016 Infinera Copyright What is a “super-channel”? The optical analogy of the multi-core CPU Super-Channel  Multiple coherent carriers  Seen as a single unit of capacity  Brought into service in one operational cycle  Implemented on one chassis/line card  Ideally using a Large Scale PIC Super-Channel Super-channels add operational scalability to coherent spectral efficiency

18. 18 | © 2016 Infinera Copyright What does 9.5Tb/s look like operationally? 100Gb/s PM-QPSK Line Cards 100G 95x100G Patch Cables 95x100G Line Cards 100G...... Transponder architectures place a huge strain on operational scalability 9.5Tb/s

19. 19 | © 2016 Infinera Copyright Integrated Super-Channel Chassis: PM-QPSK 500Gb/s per 2RU unit – including client ports 19x500GPatch Cables 19x500G Chassis 5X reduction in operational complexity 1 Rack 38RU 9.5Tb/s

20. 20 | © 2016 Infinera Copyright Super-Channels and Transport SDN: Traditional Optical Capacity Provisioning 100G Transponder DWDM Mux Long Haul Fiber Truck Roll Conventional transponder capacity cannot be controlled at a distance

21. 21 | © 2016 Infinera Copyright 500G Super-Channel Line Card Long Haul Fiber Imagine if you could plug in all these cards on Day 1: Super-Channel Provisioning with Instant Bandwidth™ “Instant Bandwidth” Capacity that is ready in the network Available for new service activation Available for existing service protection But still “pay as you grow” for cashflow-efficiency Infinera Instant Bandwidth™ can be controlled at a distance

22. 22 | © 2016 Infinera Copyright Infinite Flexibility: Sliceable Photonics, Time-Based Instant Bandwidth F A B C D E 200G 100G 500G 300G 100G Multi-terabit Super-channel Activate Inst. BW (1.5T) Slice, Route, Modulate Pre-Deploy (up to 2.4T) 200G Use Time-Based Inst. BW Subsea 100G SDN Plan

23. 23 | © 2016 Infinera Copyright The Disaggregated Transport Network SDN Controller Instant Bandwidth ROADM sliceability End to End orchestration Super-Channel line card or chassis ROADM SDN Controller Disaggregated Routers

24. 24 | © 2016 Infinera Copyright Rapid feature development implies frequent embedded O/S updates Enabling SDN Control: Direct API Option 1: Direct API on element management card  SDN Controller     Commands flow directly from Controller to Network Element

25. 25 | © 2016 Infinera Copyright Enabling SDN Control: OTSv Option 2: Create a virtualized element manager as a mediation platform Enables rapid feature development without embedded O/S updates  SDN Controller Infinera OTSv Hundreds of possible commands Tens of possible commands OTSv 1.0 OTSv 2.0 OTSv 3.0 No O/S changes here

26. 26 | © 2016 Infinera Copyright Summary  Applying SDN protocols to the Transport Network can offer new solutions to long-standing network requirements  Router architectures are moving to increased disaggregation to deal with high costs, and to facilitate routing as a VNF  In the Transport Network, super-channels provide a programmable Data Plane for terabit scale Transport SDN  End goal is to lower hardware costs, lower ongoing service costs, and improve network response to service demands

27. 27 | © 2016 Infinera Copyright Thank You Geoff Bennett gbennett@infinera.com