1. 13-14.04.2011CEng3361 CENG 336 INT. TO EMBEDDED SYSTEMS DEVELOPMENT Spring 2011 Recitation 06

2. 13-14.04.2011CEng3362 OUTLINE A/D Module LCD Driving Specs Sample code

3. 13-14.04.2011CEng3363 A/D Conversion Many sensors used to monitor the real world produce analog or continuous voltage signals. These signals must be converted to digital form before the computer can process them. Analog-to-digital converter (ADC or A/D) converts analog signals to digital values. 3-bit AD converter time Digital output 5 V 4.37 3.75 3.12 2.50 1.87 1.25 0.62

4. 13-14.04.2011CEng3364 A/D Module in PIC16F877 8 Analog input channels 10-bit resolution Software selectable reference voltages Can operate in SLEEP mode using its own internal RC oscillator

5. 13-14.04.2011CEng3365 Block Diagram

6. 13-14.04.2011CEng3366 Registers A/D Result High Register (ADRESH) A/D Result Low Register (ADRESL) A/D Control Register0 (ADCON0) A/D Control Register1 (ADCON1)

7. 13-14.04.2011CEng3367 Registers

8. 13-14.04.2011CEng3368 Registers

9. 13-14.04.2011CEng3369 Registers A/D Result Justification

10. 13-14.04.2011CEng33610 A/D Module Operation The analog input charges a sample and hold capacitor. The output of the sample and hold capacitor is the input into the converter. The converter then generates a digital result of this analog level

11. 13-14.04.2011CEng33611 Analog Input Model

12. 13-14.04.2011CEng33612 A/D Acquisition Time Requirements There is a minimum acquisition time to ensure that the holding capacitor is charged to a level that will give the desired accuracy for the A/D conversion. Look at the datasheet for calculations.

13. 13-14.04.2011CEng33613 A/D Conversion T AD Cycles The A/D conversion time per bit is defined as T AD. The A/D conversion requires 11.5-12 T AD per 10-bit conversion.

14. 13-14.04.2011CEng33614 Selecting A/D Conversion Clock The four possible options for TAD are: 2T OSC 8T OSC 32T OSC Internal RC oscillator For correct A/D conversions, the A/D conversion clock (TAD) must be selected to ensure a minimum TAD time of 1.6 μs.

15. 13-14.04.2011CEng33615 A/D Module Operation The analog input channels must have their corresponding TRIS bits selected as inputs.

16. 13-14.04.2011CEng33616 A/D Module Operation When the A/D conversion is complete, the result is loaded into this A/D result register pair, the GO/DONE bit (ADCON0 ) is cleared, and A/D interrupt flag bit, ADIF, is set.

17. 13-14.04.2011CEng33617 Some Notes If the TRIS bit is cleared (output), the digital output level (VOH or VOL) will be converted.

18. 13-14.04.2011CEng33618 LCD

19. 13-14.04.2011CEng33619 LCD Pinouts PinLevelDescriptionConnection 10 VGroundGND 2+5 VVcc+5V 3VariableContrast VoltagePot. 4H/L"R/S“, H:DATA, L:InstructionRC0 5H/L"R/W“, H:Read (Lcd →Pic), L:Write(Pic → Lcd)GND 6H, H→L"E" Clock inputRC1 7-14H/LI/O PinsPORTD 15-Backlight anode+5V 16-Backlight cathodeRA5(INVERTED)

20. 13-14.04.2011CEng33620 R/S, R/W and E The "R/S" bit is used to select whether data or an instruction is being transferred between the microcontroller and the LCD. H:DATA, L:Instruction H:Read (Lcd →Pic), L:Write(Pic → Lcd) On the demo board you can make only write operations since the "R/W" pin is connected to GND. After an instruction code or a data presented to the I/O pins a clock pulse should be sent to the "E" pin. PORTD

21. 13-14.04.2011CEng33621 Addressing and Memories Inside LCD DDRAM : Data Display RAM is the working data buffer of the display. Each character on the display has a corresponding DDRAM location and the byte loaded in DDRAM controls which character is displayed. Relationship between DDRAM addresses (7-bit) and positions on the liquid crystal display. CGROM : Character Graphics ROM that holds the fixed character set, namely all the standard patterns of dots for dot matrix characters CGRAM : Character Graphics RAM that allows the user to define special supplementary non-standard character types that are not in the CGROM. You can load your own dot pattern shapes and display them.

22. 13-14.04.2011CEng33622 LCD Instruction Codes The value of R/S bit: Low

23. 13-14.04.2011CEng33623 RSR/WD7D6D5D4D3D2D1D0 0000000001 Clear Display Clears all display memory and returns the cursor to the home position (leftmost character of Line1).

24. 13-14.04.2011CEng33624 RSR/WD7D6D5D4D3D2D1D0 000000001X Return Home Returns the cursor to the home position DDRAM contents remain unchanged

25. 13-14.04.2011CEng33625 RSR/WD7D6D5D4D3D2D1D0 00000001I/DS Entry Mode Set Sets the cursor move direction and specifies or not to shift the display. These operations are performed during data write and read. I/D = 1 : Increment DDRAM address I/D = 0 : Decrement DDRAM address S = 1 : Display shift [I/D = 1 : Left, I/D = 0 : Right] S = 0 : No display shift

26. 13-14.04.2011CEng33626 Command: 0000100 Decrement Address Counter Display Shift :OFF Command: 00000101 Display Shift :ON Shift RIGHT Command: 00000110 Increment Address Counter Display Shift :OFF Command: 00000111 Display Shift :ON Shift LEFT Example entry mode settings* * images taken from: http://www.dinceraydin.com/lcd/commands.htm

27. 13-14.04.2011CEng33627 RSR/WD7D6D5D4D3D2D1D0 0000001DCB Display & Cursor Control Sets display (D), cursor (C), and blinking of cursor (B) on/off control bit. D = 1 : Display is ON D = 0 : Display is OFF C = 1 : Cursor ON C = 0 : Cursor OFF B = 1 : Blink ON B = 0 : Blink OFF

28. 13-14.04.2011CEng33628 RSR/WD7D6D5D4D3D2D1D0 000001S/CR/LXX Cursor or Display Shift Moves the cursor or shifts the display without changing DD RAM contents. S/CR/LOperation 00The cursor position is shifted to the left 01The cursor position is shifted to the right 10The entire display is shifted to the left with the cursor 11The entire display is shifted to the right with the cursor

29. 13-14.04.2011CEng33629 RSR/WD7D6D5D4D3D2D1D0 00001DLNFXX Function Set Sets interface data length (DL), number of display lines (N), and character font (F). DL = 1 : 8-bit DL = 0 : 4-bit N = 1 : 2 lines N = 0 : 1 line F = 1 : 5x11 dots F = 0 : 5x8 dots

30. 13-14.04.2011CEng33630 RSR/WD7D6D5D4D3D2D1D0 001A6A5A4A3A2A1A0 Set DDRAM Address Sets the DDRAM address Relationship between I/O port (PORTD in our case) values and positions on the liquid crystal display.

31. 13-14.04.2011CEng33631 RSR/WD7D6D5D4D3D2D1D0 0001A5A4A3A2A1A0 Set CGRAM Address Sets the CGRAM address

32. 13-14.04.2011CEng33632 RSR/WD7D6D5D4D3D2D1D0 10D7D6D5D4D3D2D1D0 Write Data to RAM Writes data into the RAM