1. Atlas Upgrade week - November 15 th, 2011M. Raymond – CERN/PH-ADO-PO 1 Introduction Many activities are planned to be performed during the shut down 2013-2014. The sequence of opening/closing and the configuration chosen for the Detector area are guided by the priorities in between these activities. Known activities that require a specific configuration of UX15 Replacement of beam pipes (VA, VT, VI) IBL installation nSQP/Pixels Removal of MB scintillators New LVPS for Tiles New LVPS for LAr Tile drawers repair Completion of EE chambers installation MDT + RPC chambers in sector 13 Replacement of few TGC chambers in Big Wheels New neutron shielding on the toroid end cap Probably the most constraining Standard opening is suitable (more or less)

2. Atlas Upgrade week - November 15 th, 2011M. Raymond – CERN/PH-ADO-PO 2  Side C needs to be moved to a Large Opening configuration  Side A is in Standard Opening configuration (like in 2010 and 2011) Although VA and VT beam pipes are replaced with Aluminum ones The opening will be as efficient as possible No planned stop for any intervention on detectors Shut down starts on Dec. 03 rd, 2012 / ends July. 31 st, 2014 Pixels extraction/insertion ≈ 1-2 weeks (based on installation) Pixels connection and commissioning ≈ 14 weeks (based on installation) Main assumptions used in the schedule The shutdown in a nutshell Two options are still under consideration : 1.To insert IBL in situ 2.To extract the Pixels and install both NSQP and IBL at surface (SR1) In both options, the opening scenario is nearly the same. Configuration for Pixels / IBL extraction is completed by January 25 th, 2013 In order to be closed on July 31 st 2014 Pixels/IBL insertion must be completed by mid-February 2014 About 1 year is available for the integration work in SR1

3.  A framework of the time schedule and scenario is prepared and will be soon on ATLAS dedicated page https://atlasop.cern.ch/shutdown/shutdown-2013-2014.php

4. IBL FEI4 B FEI4 B design has been closed and finished during September – Design includes only fixes and things necessary for the IBL Final design was signed off – See https://indico.cern.ch/conferenceDisplay.py?confId=154175 Chip was submitted to IBM Sept 19 28 wafers were ordered, with 16 of them on “fast track” (44 days instead of normal 73 days) Expect first wafers end of November. Submitted !

5. Sensor technology Planar Slim Edge Sensors (CiS) oxygenated n-in-n silicon; 200 µm thick minimize inactive edge by shifting guard-ring underneath pixels  215 µm inactive edge achieved 3D Slim Edge Sensors (FBK and CNM) partial 3D: electrodes etched from both sides p-type substrate; 230 µm thick no active edge  ~200 µm inactive edge achieved (drawing outdate: columns penetrate full sensor)

6. Hit Efficiency in testbeam SCC61: Planar 6x10 15 n eq cm -2 SCC97: 3D CNM 6x10 15 n eq cm -2 96.9% 97.4% punch- through bias dot solder bump A number of pixels don’t work after proton irradiation (TID ~ 3x IBL lifetime) Same behaviour for both sensor types  FE-I4 “feature” (Pixels masked during analysis) Data taken at Φ =15 ° incidence  smearing of electrode structure

7. Sensors for IBL: 3D and Planar ATLAS Pixel extended Institute Board endorsed the recommendation of the review panel: produce enough Planar sensors to build 100% of the IBL continue current 3D sensor production to build 25% of the IBL 3D slim edge (FBK,CNM) Planar n-n Slim Edge Design (CiS) Target 25% IBL 6 batches in production: 3@CNM and 3@FBK, the first 3 batches will go to IZM for bumpbonding Delivery dates agreed with manufacturers for Sept, Nov, (first 3 batches) + early 2012 (next 3 batches) 1 st batch now at IZM for BB Target 100% IBL 6 batches in production at CIS Delivery dates agreed with manufacturers for Aug Sept, Oct, Dec and Jan, to complete order 3 batches at IZM for BB

8. Stave Flex circuits 2 Designs: multi-layer flex and Al-kapton flex have been reviewed during September Recommendation received from reviewers: – Multi-Layer Cu/Al flex adopted as baseline – A backup solution based on pure Cu (standard technology) is developed in parallel Based mainly on schedule constraints, risk evaluation, manufacturer’s track record and the seemingly modest physics gain resulting from the mass difference between the two options the Review unanimously decided to recommend to the IBL Management to accept the multilayer design as baseline for the IBL stave. We are, however, concerned with the potential risk associated with the Al/Cu via technology, which lacks maturity. As insurance against a possible fatal flaw in the via technology revealed by more comprehensive QA/QC tests yet to be carried out, a backup should be developed and manufactured in parallel, based entirely on standard technology. We strongly recommend embarking on such a comprehensive qualification programme.

9. DBM modules: Lab and Testbeam Results Four DBM modules built at IZM – 21x18 mm 2 pCVD from DDL – FE-I4 ATLAS IBL pixel chip – 336x80 = 26880 channels, 50x250 μm 2 Testbeam and labtests very encouraging Four more DBM modules with final specs currently in process at IZM Diamond + I4 I4 only Module on test board 4 modules after flip-chipping First noise map of a DBM module X-ray perfect Noise map uniform – Indication of success  HV issue due to IZM metallization up to edge

10. DBM integration and support: Definded interfaces in cooperation with nSQP. No showstoppers, agreed to work sharing: – Services routing done, big thanks to nSQP team – DBM is treated as (half)stave 15 of IBL DBM now also included in IBL MoU DBM should be included in next presentation to LHCC to get approval

11. Focus over the last 12 months Understanding design & connectivity Imported CAD model from PE to CATIA Design changes: e-readout, mechanics, reliability Procurement, prototyping Setting up infrastructure in B180 cleanroom Assembly & QC procedures Assembly trials 15/11/2011 F. Dittus nSQP Project Status ATLAS Upgrade Week 11 PP1 PP0 As-built Mock-up, April 2011 OSP ISP

13. Phase-II (installation 2022-23) 1. New ID (strips and pixels) (Very substantial progress in many areas, 27 sessions out of total of 55 ID related) 2. New LAr front-end and back-end electronics 3. New Tiles front-end and back-end electronics 4. LAr new FCAL ? 5. LAr HEC cold electronics consolidation ? 6. Muon Barrel and Large Wheel system upgrade ? 7. TDAQ upgrade 8. L1 track trigger (possible role of gas detectors)? 9. TAS and shielding upgrade 10. LUCID upgrade ? 11. Various infrastructures upgrade 12. Common activities (installation, safety, …)