1. An Najah National University Telecommunication Engineering Department
Digital Communications
69342
Digital Modulation
Dr. Allam Mousa
Sec3_Dig_Modu

2. Chapter 12 / Tomas : Digital Modulation AM
FM are replaced by Digital Modulation . PM
Digital communication system sare ;
Easy for process.
Easy for multiplexing.
Noise immunity .
A/D D/A
Analog Or digital signal
Destination
Channel
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3. 1 1 1
ASK
PSK
FSK
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4. Digital Radio vs. Analog Radio
FSK &PSK signals have a constant envelope. So they are preferred to ASK signals for passband data transmission over nonlinear channels.
*phase –recovery circuit : ensures that oscillator supplying the locally generated carrier wave in the receiver is synchronized (frequency and phase ) to the oscillator at the transmitter.
If the receiver has a phase-recovery circuit coherent digital mod .
If the receiver has a no phase-recovery circuit non coherent digital mod .
Digital Radio vs. Analog Radio
1) In digital radio the modulating signals are digital pulses (analog waveform in analog mod ).
2) Different modulation techniques are used in digital radio .
But digital radio use analog carriers just like conventional systems.
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5. Shannon Limit for Information Capacity .
C=B log (1+S/N) bits/sec .
# of independent symbols that can be carried out through the system in a given time.
C=B log (1+SNR).
=3.32 B log (1+ SNR). 2 2 10
Example :
Consider a standard voice-band communication channel with SNR of 1000 (3 dB)
And a bandwidth of 2.7 kHz . Find the channel capacity ?
Solution :
C=B log (1+SNR)=2. 71 log (1+1000)
C= 26.9 kbps
The 2.7kHz bandwidth will carry 26.9 kbps .
((this can not be done with a binary system )) 2 2
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6. To acheive kps through 2.7kHz then each symbol transmitted must contain more thane one bit of information .
i.e , to acheive the Shannon limit (C) then digital transmission systems that have more than two output conditions ( symbols) must be used .
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7. Digital Amplitude Modulation
For AM V(t) = A/2 [1+ m(t)] cos ( 2* pi * fc*t).
modulating signal carrier signal
Let m(t)=+1 (binary) on – off-keying . (Acos(2*pi*fc*t) OR zero
ook modulation .
V(t) = Am(t) cos(2*pi*fc*t) If m(t) = 0 or 1 ook
Double side band _
dsb
DSB
OOK
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8. Frequency Shift Keying
v(t) = Vc cos [(wc +( Vm (t) w )/2)t ]
v(t): binary FSK waveform .
Vc: peak unmodulated carrier amplitude.
wc: radian carrier frequency .
Vm(t): binary digital modulating signal.
w : change in radian output frequency .
Binary input 1 1
Analog output
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9. fs : space frequency . fm > fs fm :mark frequency . freq fm fs Time
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Binary FSK

10. Bandwidth Consideration of FSK
FSK modulator (VCO)
Binary input
Analog output tb 1 1 1 1 1 1
2T1 T1
fa=fb/2
f=fb/4
Highest fundemental frequency
Occurs when alternative 1/0 .
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11. fb : input bit rate (bps). tb : time of one bit = 1/fb .
T1 : period of shortest cycle .
1/T1 : fundamental frequency of binary, square wave.
Fastest input rate when the input is a series of alternating 1s& 0s.(square wave ) .
Highest modulating frequency = 0.5 input rate (fa = fb/2).
Converting pulses (bit-rate) into sin wa t
Then
m(t) c(t) = Sin wa t sin wc t
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12. Peak frequency deviation f f = fm – fs /2 = 1/4tb (Hz . Minimum ). 1 1
2 f
FSK
modulator
fs=fc- f
fm=fc+ f tb fc
Carrier freq
Peak frequency deviation f
f = fm – fs /2 = 1/4tb (Hz . Minimum ).
fs = fc f = fc – 1/4tb
fm = fc + f = fc+ 1/4tb
For FSK :
B.W=( fm+ 1/tb) – (fs – 1/tb) = fm – fs +2/tb = 2( f + 1/tb ) .
B.W=2( f+ 1/tb)
FSK frequency spectrum (pulse sinusoidal wave have freq. spectrum that or
((sin x)/x)
1/tb
1/tb fc
fm+1/tb fm
fs – 1/tb fs
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13. 2) With FSK , baud is equal to he input bit rate = 2000 bits/sec
Example 12 – 1 :
Determine the bandwidth & baud for an FSK signal with a mark frequency of 51 kHz & a space frequency of 49 kHz , and a bit of 2 kbps .
Solution :
B.W = fm – fs + 2/tb
tb= 1/fb = 1/2000 = 0.5 msec.
B.W= – /(0.5*10^-3) = 6000Hz .
2) With FSK , baud is equal to he input bit rate = 2000 bits/sec
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14. Non coherent FSK demodulator BPF
FSK Receiver
Envelop detector
BPF fs
FSK
Input - +
Data output
Non coherent FSK demodulator
Envelop detector
BPF fm
carrier
BPF
FSK
input - +
Data output
BPF
coherent FSK demodulator
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carrier

15. Fig. PLL-FSK demodulator most common
Analog FSK in
Dc-error voltage d
Binary data output
Phase compensator
amp
VCO
PLL
Fig. PLL-FSK demodulator most common fs fm +V 0V -V
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16. Minimum Shift –Keying MSK
Similar to FSK but
fm & fs = n fb / 2 , (n is odd)
fs & fb = n fb /n , (n is odd)
Phase discontinuties
fs = n fb /2
Fig . Non continous FSK waveform (not MSK )
This may creat problems error
MSK is form of continues – phase Frequency shift keying (CPFSK)
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17. Fig . Continuous-phase MSK waveform .( error is less)
Logic 1
Logic 0
fb = 1kbps
MSK
Smooth continuoes transition fs fm
Fig . Continuous-phase MSK waveform .( error is less)
fm : mark frequency .
fm = 5 fb /2 = 5*1000/ 2 =2500 Hz .
fs = 3 fb / 2 = 3*1000 /2 = 1500Hz .
5&3 not necessary to equal .
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18. Phase Shift Keying (PSK).
Angle – modulated , constant – amplitude digital modulation .
Analog input PM
Limited number of output phase
Binary digital signal
PSK
Binary PSK (BPSK) two phases
also called phase reversal keying (PRK)
bi phase modulation ( ) ? tb
Binary input 1 1
Time
Sin wc t
Sin wc t
Sin wc t
Sin wc t
BPSK
Output
Time
Degree
Radian pi
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19. Balance (product) modulator Reference carrier oscillator
BPSK Transmitter
+1V
-1V
Balance (product) modulator
Reference carrier oscillator
BPF
Analog PSK output
Binary data in X Y
X.Y 1
OUT PUT IS THE PRODUCT X.Y
FIG. Simplified block diagram of a BPSK Tx . Modulator
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20. Bandwidth Consideration of BPSK
+1V
-1V
Balance (product) modulator
Reference carrier oscillator
BPF
Analog PSK output
Binary data in X Y
X.Y 1
out put = sin(wa t) sin(wc t)
= 0.5 cos(wc – wa)t – 0.5 cos(wc+wa)t .
Widest output BW occurs when the input binary data are alternating.
The fundamental frequency (fa) of an alternating 1/0 bit sequence is fa=fb/2
Fundamental
Freq.of binary modulating signal
Un modulated carrier
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21. The minimum double-side Nyquist bandwidth (f N ) is
wN = 2*pi*fN = 2wa =2*pi*fa .
wc – wa wc +wa
-wc +wa [wc – wa ]
SO, wN  2 wa
because fa =fb/ f N = 2(fb/2) =fb
Minimum B.W & BPSK
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22. FIG. output vs. time for BPSKtb
Binary input 1 1
Time
Sin wc t
Sin wc t
Sin wc t
Sin wc t
BPSK
Output
Time
Degree
Radian pi pi
FIG. output vs. time for BPSK
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23. Out put = sin(wa t) sin(wc t). = sin( 2*pi*fa *t) sin(2*pi*fc*t)
Example 12-2 :
For a BPK modulator with a carrier frequency of 70 MHz & an input bit rate of 10 Mbps , determine the maximum & minimum upper & lower side frequencies , draw the output spectrum .determine the minimum Nyquist bandwidth , and calculate the baud.
Solution :
fc=70 MHz , fb= 10Mbps .
f N = fb fa = f N /2 = FB/2 = 5MHz .
Out put = sin(wa t) sin(wc t).
= sin( 2*pi*fa *t) sin(2*pi*fc*t)
= sin( 2*pi*5 *t) sin(2*pi*70*t)
= 0.5 cos(2*pi*(70-5)MHz*t) – 0.5 cos(2*pi*(70+5)MHz*t)
lower side frequency upper side frequency
Lower side frequency LSF = = 65 MHz.
Maximum side frequency MSF = = 75 MHz .
Out put spectrum
fc is suppressed .
B.W=10MHz
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fc=

24. Minimum Nyquist bandwidth fN = 75 – 65 = 10 MHz = fb
Or fN = fb = 10MHz .
Baud = fb = 10Mbps .
B.W =fb for BPSK .
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25. BPSK Receiver fc <<2wc Balance Modulator X - Binary data out
+sin(wc t)
Balance
Modulator X -
Binary data out
BPSK input
LPF
sin(wc t)
Coherent
Carrier
Recovery
FIG . BPSK R x
BPSK
MOD
BPSK
MOD
Logic +1
Logic 0
-sin(wc t)
+sin(wc t) Tx Tx
Demo
+sin(wc t)
+ 0.5
Logic 1 Rx
Logic 0
AND -sin(wc t)
Demo
- 0.5
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26. sin wc t . Sin wc t out put of balanced mod.
At point X :
sin wc t . Sin wc t out put of balanced mod.
Out 1 = sin wc t =0.5 (1-cos2wc t ) =
Out 0 = -sin wc t = -0.5 (1-cos 2wc t )=
Filtered by the LPF 2
Filtered by the LPF 2
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27. BFSK & BPSK are M-ary systems with M=2 .
M- aRY Encoding
Binary FSK & binary PSK are binary systems (there are only two possible output conditions ) 0 & 1 .
BFSK & BPSK are M-ary systems with M=2 .
it is better to encode at a level higher than binary ( M>2 ).
N = log M N: #of bits .
M: # of output conditions possible N bits . 2
Input
Modulation
output
If 2-bits were allowed to enter a modulator before the output were allowed to change ,
2 = log M & M = 2 =4
2-bits 2 1
N= M=2 = 2
N= M=2 = 4
N= M=2 = 8 2 2 1 2 3 4
4- different
Output conditions. 3
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28. Quaternary Phase Shift Keying (QPSK) = M=4
QASK angle-modulated , constant – amplitude. Digital modulation .
QPSK one carrier & 4 different phases .
2-bits
4 input conditions
QPSK
4 output phases 2 N
M = 2 = 2 = 4
dibits bits groups .
2-bits input generate 1 output out of 4 possible outputs phases .
Baud rate = 0.5 input rate (for QPSK).
baud rate = bit rate for BPSK .
Output rate
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29. Reference carrier ossilator
QPSK transmitter
I- ch (fb/2)
+sin(wc t) -
Binary input data
Balanced modulator
Logic 1=+1v
Logic 0=-1v fb
Input buffer I Q
Reference carrier ossilator
Linear summer
Sin(wc t)
BPF
90 phase shift
fb/2
Bit clock /2
cos(wc t)
Q- ch (fb/2)
Balanced modulator
+cos(wc t) -
Fig.QPSK modulator
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30. 2-bits are serially inputted then 1 output .
QPSK BPSK Combined in parallel .
Possible outputs are
+sin wc t + cos wc t
+sin wc t - cos wc t
-sin wc t + cos wc t
-sin wc t - cos wc t
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31. REMEMBER THAT Acos x + B sin x = A^2 + B^2 tan (-B/A) For Q=0 , I=0
Example 12-3
For the QPSK modulator. Construct the truth table, phasor diagram and constellation diagram .
Solution :
REMEMBER THAT Acos x + B sin x = A^2 + B^2 tan (-B/A)
For Q=0 , I=0
I-ch balanced modulator output is -sin wc t
Q-ch balanced modulator output is -cos wc t
Output is -sinwc t – cos wc t
Out put due to (0,0) is tan (-1) =
= sin (wc t – 135 ) .
Similarly -1 -1
Q I
Q I QPSK output
QPSK TRUTH TABLE
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32. Fig. constellation diagram
Q I
Q I
coswc t
coswc t –sinwc t
Sin(wc t+135)
Cos wc t
coswc t+ sinwc t
Sinew t+45) 10 11
sin wc t
Sinwc t
0 reference 00 01
Q I
Q I
-cows t +since t
sinew t -45)
-cows t –since t
sinew t-135)
Fig. constellation diagram
Fig. phasor diagram
All have same amplitude
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33. Fig. output phases –versus-time relation ship for a QPSK modulator
1) QPSK outputs have the same amplitude .
2) angular separation between any two adjacent phasors in QPSK is 90 degree we can correct up to + 45 shift in phase _
Q I Q I Q I Q I
di bit input
QPSK output phases
Fig. output phases –versus-time relation ship for a QPSK modulator
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34. Bandwidth Consideration for QPSK
I-ch fb/2 & TbI =2Tbin
input data fb b/s
Q-ch fb/2 & Tba =2Tbin
Stretching bit
Input data is divided into two channels
B.W Compression _
I-ch
fb/2 +1
Balanced modulator -
+Sinwc t
Binary input data fb
Q I
Sinwc t
coswc t _ +1
+coswc t
fb/2 Q-ch -
Balanced modulator
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35. FIG. B.W consideration of a QPSK modulator .
I Q I Q I Q I Q I Q I
Input data fb
I –ch
fb/2
Q –ch
fb/2
FIG. B.W consideration of a QPSK modulator .
The bit stretched to twice the input bit length .(B.W=1/T ; T ,B.W )
Baud rate :fastest output rate of change =0.5 input bit rate for(QPSK).
=same input bit rate for (BPSK).
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36. The output of the balanced modulator (for QPSK) is
Output = sin(wa t) sin (wc t)
Where
wa t = 2*pi*fa*t = 2*pi*(fb/4)*t modulating phase .
wc t= 2*pi*fc*t Unmodulated carrier phase .
output =sin(2*pi*(fb/4)*t) sin(2*pi*fc*t).
= 0.5 cos 2*pi*(fc – fb/4)t – 0.5 cos (2*pi*(fc + fb/4)t
Output frequency spectrum extends from fc- fb/4 to fc + fb/4 .
Minimum B.W f N = fmax – fmin = fb/2 .
B.W = fb/2 for QPSK
B.W = fb for BPSK fc
fb/2
fc – fb/4
fc + fb/4
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37. Example :
For a QPSK Modulator with an input data rate fb =10 Mbps , and a carrier frequency fc = 70 MHz , determine
1)the minimum double – sided Nyquist bandwidth f N and baud rate .
2)Compare the results with a BPSK (same conditions, previous example ) .
Solution :
The bit rate in both the I and Q channels one half of the transmission bit rate.
fbQ = fbI = fb/2 = 10/2 Mbps = 5 Mbps .
highest fundamental frequency presented to either balanced modulator is
fa = fbQ /2 or fbI /2 = 5MBPS /2 = 2.5 Mbps .
sin (2*pi*fa*t) Sin (2*pi*fc*t)
Input rate fa bps
Balanced modulator
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Sin (2*pi*fc*t)

38. Out is sin (2*pi*fa*t) sin(2*pi*fc*t)=
0.5 cos 2*pi*(70-2.5)*t – 0.5 cos 2*pi*(70+2.5)t .
Minimum Nyquist bandwidth f N = 72.5 – 67.5 = 5 MHz.
Or f N = fbQ =fbI = fb
Symbol rate = bandwidth = 5M baud .
B.W = 5MH z
67.5MHz
72.5MHz fc
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39. Comparing : QPSK BPSK f N 5 MHz 10 MHz baud rate 5 M baud 10 M baud
For the same input bit rate
f N (QPSK) =0.5 f N (BPSK) f N = fb for BPSK
f N =0.5 fb for QPSK
baud rate (QPSK) = 0.5 baud rate (BPSK)
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40. sin(wc t)(-sin wc t +cos wc t) Cos(wc t)(-sin wc t +cos wc t)
QPSK receiver
sin(wc t)(-sin wc t +cos wc t)
I – CH -
Product detector
+ 0.5 V (logic 0)
LPF
-Sin wc t + cos wc t
Recived binary data
Input QPSK signal
Sin wc t
Carrier recovery sin wc t
Power splitter
Q I
LPF
+90
-Sin wc t + cos wc t
cos wc t
LPF
-Sin wc t + cos wc t
Product detector
+ 0.5 V (logic 1) -
Q – CH
Cos(wc t)(-sin wc t +cos wc t)
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41. I =(-sin wc t +cos wc t )(sin wc t) (QPSK input signal) (carrier)
I –CH
I =(-sin wc t +cos wc t )(sin wc t)
(QPSK input signal) (carrier)
= -sin wc t sin wc t + cos wc t sin wc t .
=- sin wc t + cos wc t sin wc t.
= -0.5(1-cos2wc t)+0.5 sin(wc+wc)t +0.5 sin(wc-wc)t.
filtered filtered
I = cos 2wct sin 2wct +0.5 sin 0
I =- 0.5 V  I = 0 (logic).
Q = 0.5 V  Q=1 (logic).
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42. Offset QPSK (OQPSK) OR (OKQPSK)
Offset QPSK (OQPSK) OR (OKQPSK) : OQPSK is a modified form of QPSK where the bit waveforms on the I & Q channels are offset or shifted in phase from each other by one-half of bit time .
I –ch input data
One half bit relay
Balance modulator
OQPSK OUT
Reference carrier oscillator
Linear summer
+90
Q –ch input data
Balance modulator
Fig. OQPSK block diagram
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43. Cos wc t -sin wc t sin wc t -Cos wc t Fig. bit alignment. tb b1 b2 b3
I-ch
tb/2 b0 b1 b2 b3
Q-ch tb
Q I
1 1
Q I
0 1
Cos wc t
+135
+45
-sin wc t
sin wc t
Q I
0 1
Q I
0 0
-135
-45
FIG. Constellation
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-Cos wc t

44. In OQPSK :
There is never more than a single bit change in the dibit code ,
So;
There is never more than a 90 shift in the output phase.
In conventional QPSK 00 to shift in the output phase .
01 to 10
An advantage of OQPSK is the limited phase shift .
A disadvantage of OQPSK is that
baud rate (OQPSK) = 2fbI = 2fbQ
baud (OQPSK) =2 baud (QPSK)
fN (OQPSK) =2 fN (QPSK)
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45. Eight – Phase PSK 8 PSK = MPSK M=8, N-3 Binary M =2 N = 1
Dibit M = N =2
Tribit M= N=3
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46. M-ary pulse amplitued modulation
PAM levels
+1.307
+0.541
-1.307
Rb/3
2to4 level converter
PAM
Product modulator
I-channel
Input Rb
sin wc t C
Rb/3
8-PSK
Reference oscillator
Linear summer
Q I C
Inverter
+90 C
cos wc t
Rb/3
2to4 level converter
PAM
product modulator
Q-channel
M-ary pulse amplitued modulation
M=4
Fig. 8-PSK modulator
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47. Truth table for I-ch truth table for Q-ch
I C output Q Cpar output
2 – to – 4 level converter inputs (I , C or Q , Cpar ) AND 4 – outputs
parallel input digital – to-analog converter
DACs with 2-input bits ,4-output level voltage .
I or Q determines the polarity of the output analog signal (1 +ve & 0 -ve ).
C or Cpar determines the magnitude (1  & 0  v ) )
2 magnitude & 2polarities  4 different output conditions are possible .
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48. PAM sin wc t cos wc t PAM Example 12-5
For a tribit of Q=0 & I=0 And C=0 (0 0 0 ),determine the output phase for the 8-PSK
Modulator ?
2to4 level converter
PAM
Product modulator
I-ch
sin wc t
Reference oscillator
Linear summer
Q I C
+90 1
cos wc t
2to4 level converter
PAM
product modulator
Q-ch
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49. I-ch
Inputs to 2-to-4 converter are (0 0)  from truth table PAM = V .
Q-ch
Inputs to 2-to-4 converter are ( 0 1 )  from truth table PAM = V .
I C
Q C `
Product
Mod. I V
sinwc t
I-ch . Product modulator
sinwc t V
Product mod .Q
coswc t V
Coswc t
Linear summer output = sin wc t cos wc t .
= 1.41 sin(wc t – ).
For the remaining tribit codes (001, 010 , 011 , 100 ,101 , 110 , 111) the procedure is the same .
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50. Coswc t
sinwc t+1.307coswc t
0.541 sinwc t+1.307coswc t
0.541 coswc t-1.307sinwct
0.541 coswc t+1.307sinwc t
Fig. Phaser diagram. ASLO constellation can be found)
sinwc t
coswc t-1.307sinwc t
coswc t sinwc t
0.541 sinwc t coswc t
sinwc t coswc t
The tribit code between any two adjacent phases changes by only one bit .(called Gray Code )OR (Maximum distance code) . Used to reduce the number of transmission errors .
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51. Serial to parallel converter
8- PSK (M- ary M = 8 )
8 = 2 ^ 3 the incoming bits are grouped into 3 bits (tribit) .
I =In-phase channel .
Q =in- quadrature channel .
C = control channel .
I-channel
Rb/3
Input data Rb
Q I C
Rb/3
Serial to parallel converter
Rb/3
Q-channel
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52. Truth table for 8-PSK modulator
Cos wc t
QI C
Truth table for 8-PSK modulator
Binary input 8-psk output phase
110
100
101
111
sin wc t
001
011
010
000
Angular seperation between any two adjacent phasors in 45 .So; *(half of that with QPSK).
So, an 8-PSK signal can undergoes almost a phase shift during transmission &still
retain its integrity. -
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53. Bandwidth Consideration of 8 PSK
Power splitter splits the I,C,Q to three times the input
Note
Baud rate for 8-PSKis (1/3)Rb =minimum band width
2-to-4 level converter
PAM
Rb/3
Data Rb
Rb/3
Q I C
Rb/2
C I Q C I Q C I Q C I Q
Input data Rb
I-CH
Rb/3
C-ch
Q-ch
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FIG. B.W consideration of a 8-psk modulator

54. As for the previous figure (BW), The highest fundamental frequency in the I, Q, C is equal to one sixth of the bit rate of the binary input.
i.e., one cycle in the I,Q,C takes the same amount of time as six input bits.
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55. 34-note
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56. Referring to the block diagram. RbQ = RbI =Rbc =Rb/3 = 10/3 Mbps.
Example 12 – 8
For an 8 – PSK modulator with an input data rate Rb = 10 Mbps and a carrier frequency of 70 MHz , determine the minimum double-sided Nyquist bandwidth (f N ) & The baud .
Solution :
Referring to the block diagram.
RbQ = RbI =Rbc =Rb/3 = 10/3 Mbps.
The highest fundamental frequency OR fastest rate of change presented to either balanced modulator is
fa = fbQ/2 =fbI/2 =fbc/2 =3.33/2 =1.667 Mbps .
The output wave form the balanced modulator is sinwc t sinwa t
Or sin(2*pi*fa*t) sin(2*pi*fc*t)
2 –to -4
Converter
Balanced mod
2parallel input
PAM
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57. =0.5 cos(2*pi*(fc-fa)t) – 0.5 cos(2*pi*(fc+fa)t)
= 0.5 cos (2*pi [( )MHz] t ) – 0.5 cos (2*pi*[( )MHz] t
=0.5 cos (2*pi*(68.333MHz)t ) – 0.5 cos (2*pi*(71.667MHz)t).
The minimum Nyquist B.W is f N = =3.333MHz .
Baud =B.W =3.333 megabaud .
f N = MHz.
B=3.333MHz
71.667
68.333
fc =70
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58. Parallel to serial converter
8 – PSK Receiver
Analog to Digital I
4-level
PAM
Product detector C
output
sinwc t
8-PSK in
Carrier recovery
Power
splitter
Q I C
Parallel to serial converter 90
Coswc t C
Analog to Digital
Product detector
4-level
PAM Q
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59. What is the truth table and constellation
16- PSK … … quadbit
Baud rate = (output rate of change) and the minimum bandwidth (fb/4) ???
What is the truth table and constellation
Find a block diagram for 16 PSK
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60. Quadratur Amplitude Modulation (QAM)
Information is contained to both the amplitude & phase of the transmitted carrier .
Output of 8-QAM (Not a constant –amplitude signal )
8 –QAM Tx is so similar to the 8-PSK Tx except the inverter is removed .
101
coswc t
111
Constellation diagram
100
110
sinwc t
Phasor diagram
010
000
011
001
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61. Adding an inverter to 8-QAM transmitter makes it an 8-PSK
QAM modulator
I & Q bits determine the polarity of the QAM signal & the C channel determines the magnitude .
Rb/3
2to4 level converter
PAM
Product modulator
I-channel
Input Rb
sin wc t C
Rb/3
8-QAM
output
Reference oscillator
Linear summer
Q I C
+90
cos wc t
Rb/3
2to4 level converter
PAM
product modulator
Q-channel
Adding an inverter to 8-QAM transmitter makes it an 8-PSK
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62. B.W for 8-QAM = B.W for 8-PSK =Rb/3 .
Also QAM …
16-PSK …
I & Q bits determine the polarity of the PAM signal at the out put of the 2-to- 4level converter , C channel determines the magnitude .
The minimum B.W required for 8-QAM is Rb/3 (same as 8-PSK ).
101
coswc t
111
0.766v
100
Fig. Constellation diagram for QAM
110
sinwc t
010
000
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011
001

63. Truth table for the I&Q channel 2-to-4 level converter
Question :
Sketch the output phase &amplitude .vs. time relationship for 8-QAM ?
I/Q C OUTPUT
Truth table for 8-QAM modulator
Binary input 8-QAM output phase
QIC amp Phase
Truth table for the I&Q channel 2-to-4 level converter
2 Amplitudes & 4 phases
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64. Example 12-7
For a tribit of (000) , determine the output amplitude & phase for the 8-QAM Transmitter .
Solution :
The input to the I-ch 2-to-4 level converter are (I=0 , C=0), from I truth table , the output is
Similarly for Q-ch  to-4 output is
I-ch product modulator  and sinwc t
The output is
I = sinwc t
Q = coswc t
Output = sum ( I + Q )  sinwct – coswct
= sin(wc t -135 )
Similar procedure for 001,010,011,100,101,110,111
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65. BANDWIDTH CONSIDERATINOF 8-QAM
8-QAM Rx
16-QAM
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66. Band Width Effecting (called information density ) (CHECK)
Compares the performance of one digital technique to another.
B.W efficiency = [transmission rate(bps) / minimum bandwidth(Hz)] unit [(bits/sec)/Hz] = bits/cycle
Example 2-10 :
Determine the bandwidth efficiencies for the following modulation schemes , BPSK,QPSK ,8-PSK & 16-PSK .for a transmission rate of 10 Mbps .
Solution :
The minimum bandwidths required were .
Modulation scheme minimum B.W (MHz) B.W efficiency
BPSK Rb (FULL) =10MHz Mbps/10MHz =1bit/cycle
QPSK Rb/2 = 5MHz /5 =2 bit/cycle .
8-PSK Rb/3 =3.33 MHz /3.33= 3 bit/cycle .
16-PSK Rb/4 = 2.5 MHz /2.5 =4 bit/cycle .
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67. BPSK B.W efficiency =10(Mbps)/10(MHz) = 1 bit/cycle .
QPSK B.W efficiency = 10 /5 = 2 bits / cycle .
8-PSK B.W efficiency =10/3.33 = 3 bits/cycle .
16 – PSK B.W efficiency =10/2.5 = 4 bits/cycle .
BPSK is the least efficient. 16 PSK is the most efficient
……………………………………………….
16-PSK requires (1/4) BW as BPSK for the same input bit rate .
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68. Probability of Error & Bit Error Rate (Pe & BER)
Pe : theoretical (mathematical) expectation .
BER : empirical (historical) record .
Pe is a function of :
1) Carrier to noise power (C/N) or (Eb /No) .
Eb : average energy per bit.
No : noise power density .
N: thermal noise power .
C: carrier power .
2) M: the number is possible encoding conditions .
C(dBm) =10 log C(watts) /0.001.
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69. C(dBm) =10 log C(watts) /0.001.
Thermal Noise Power N=kTB
K=boltzmann’s constant ( 1.38 *10^ -23)J/k.
T: temprature kelvin (0 k=-273 C) , To = 290 k room .
B: bandwidth (Hz).
N (dBm) = 10 log (kTB)/0.001.
C/N = C/KTB (unit less) C: carrier power .(W).
N: Noise power .(W) .
C/N (dB) = 10 log (C/N) = 10 logC – 10 log N
= C(dBm) – N (dBm) .
dBm :…… milliwatt.
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70. Energy per bit Eb = cTb ( J/bit)
Eb : average energy per bit.
C: carrier power .
Tb: time of a bit
Eb (dBJ) = 10 log Eb .
Tb = 1/Rb Rb :bit rate .
Eb = cTb = C/Rb (J/bit ) .
Eb (dBJ) = 10log (C/Rb)
=10 logC – 10 log Rb
Also ,
No =N/B (W/Hz)
No: Noise power density (W/Hz) , N: thermal noise power (W), B: Bandwidth (Hz) .
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71. No(dBm) = 10 log (N/0.001) – 10 log B
No(dBm) = N(dBm) – 10log (B) .
But , No = kTB/B = KT (W/Hz) .
No(dBm) = 10 log (k/0.001) + 10 log (T) .
No : noise power present in 1Hz of Bandwidth .
Eb/No = (C/Rb)/(N/B) = CB/N Rb = (C/N) *(B/Rb)
carrier to noise power ratio noise bandwidth to bit rate ratio
Eb/No(dB) = 10 log (C/N) + 10 log (B/Rb)
Eb/No(dB) = 10 log Eb log No .
Eb/No is used to compare 2 or more digital modulation systems that use different transmission rates (bit rate ) , modulation schemes
(FSK,PSK,QAM), OR encoding techniques ( M- ary ) .
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72. Example : (CHECK)
For a QPSK system ,
C= 10^-12W , Rb= 60 kbps , N = 1.2 * 10^-14 W , B= 120 kHz .
Determine
a) carrier power in dBm .
b) noise power in dBm .
c) noise power density in dBm .
d) energy per bit in dBJ .
e) carrier to noise power ratio in dB.
f) Eo/No ratio .
Solution :
a) C(dBm) = 10 log C/0.001 = 10 log (1*10^-12)/ = -90 dBm .
b) N(dBm) = 10 log (N)/0.001 = 10 log (1.2*10^-14) / 0.001= dBm .
c) No(dBm) = N (dBm) log B = – = -160 dBm .
Or , No =N/B = 1*10^ No(dBm) = 10log (No/0.001) = -160 dBm.
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73. d) Eb(dBJ)= 10 log C/Rb = 10 log (10^-12)/60kbps =-167.8 dBJ.
e) C/N = 10 log C/N = C(dBm) – N(dBm) = -90 – (-109.2) = 19.2 dBm .
f) Eb / No (dB) = 10 log (C/N) + 10 log (B/Rb) = log (120 kHz/60kbps)
= 22.2 dB.
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74. (CHECK) PSK error performance
Bit error probability of an M-PSK
Pe = 1/log M , erf (z)
z = sin (pi/M)( log M ) ( Eb /No ) for M-PSK .
erf : error function
M: # of phases . 2 Pe
10^-1
10^-2
10^-3
10^7
10^-8
32 level
16 level
8 level
Fig. error raty of PSK
Eb/No
2-4 level
Same Pe
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75. (CHECK) Example :
Determine the minimum bandwidth required to achieve a Pe of (10^-7) for an 8-PSK system operating of 10 Mbps with a carrier-to-noise power ratio of 11.7 dB.
Solution :
From fig. 8-PSK 10^-7  Eb/No = 14.7dB .
Eb/No = (C/Rb)/(N/B) = (C/N)* (B/Rb)  minimum B.W (B) B/Rb =( Eb/No) / (C/N) .
B/Rb(dB) = ( Eb / No) (dB) – (C/N) (dB))
B/Rb = 14.7 – 11.7 = 3 dB B/Rb = antilog 3= 2.
B = 2Rb B(min) = 2(10 Mbps) . B(min) = 20 MHz .
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76. (CHECK) QAM error performance .
IS QAM better than MPSK for M> 4
Pe = (1/log L) (L -1 /L) erf C(z) .
L : # of levels on each axis L=2.
erfc : Complementary error function .
z = ( log L / L-1 ) ( Eb/No) 2 2
10^-1
10^-2
10^-3
10^-8
64 level
16 level
32 level
4 level
Eb/No
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FIG. QAM Error rate

77. Table 12-2 for Pe = 10^-6 = BER . C/N(dB) Eb/No(dB) BPSK 10.6 10.6
QPSK
4QAM
8QAM
8PSK
16PSK
16QAM
32QAM
64QAM
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78. For the same Pe Eb/No (4-QAM) < Eb/No (8-PSK) 4-QAM is better .
(CHECK) Example 12 – 13
Which system requires the highest Eb/No ratio for a probability of error of 10^-6 , a four – level QAM system or an 8-PSK system .
Solution :
4-QAM at 10^ dB
4-QAM
Pe = 10^ Eb/No =10.6 dB.
(fig.QAM Pe ) .
8-PSK
Pe = 10^ Eb/No =14dB
(fig. 8-PSK Pe)
For the same Pe Eb/No (4-QAM) < Eb/No (8-PSK)
4-QAM is better .
64 level
32 level Pe
16 level
10^-6
4 level
Eb/No vs. Pe for QAM . FIG.
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79. FSK Error Performance (CHECK)
(different than PSK ,QAM treatment ).
noncoherent (asynchronous ).
FSK has two types
coherent (synchronous ) .
1) Noncoherent FSK : Trans & Rec are not freq or phase synchronized.
P(e )= 0.5 exp ( -Eb /No) . (for non-coherent FSK)
2) Coherent FSK : Trans & Rx are in freq & phase synchronization
P(e) = erfc ( Eb /No) . (for coherent FSK) .
Noncoherent Pe
Coherent better
Eb/No
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80. Differential Phase Shift Keying (DPSK) check Rx . (CHECK)
PSK requires a complicated synchronizing circuit at the Rx (disadvantage )
(requires recovering the phase-coherent circuit ) .
DPSK avoids this complexity .
* Let b’(t) : the binary message to be transmitted .
b b(t): auxiliary message stream generated from b(t) , using a logic circuit .
* the first bit in b(t) is arbitrary .
* subsequent bits in b(t) determine as
when b’(t) = b(t) does not change its value .
b(t) = b(t) changes its value .
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81. Fig.block of DPSK Transmitter
Example :
b(t)
b(t)
phase pi pi pi pi Or
b(t)
phase pi pi pi pi pi
arbitrary
b(t)
b(t)
Logic circuit (XNDR)
Balance modulator
(multiplier)
V(t) = + Acos wo t -
V(t)
1 bit delay
Acos wo t
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Fig.block of DPSK Transmitter

82. Synchronous detector multiplier2 2
V(t) V(t-T)(A/2V)[ coswoT+cos2wo (t-T/2) ]
V(t) V(t-T)
b(t)
(V(t)/V) *Acos wo (t)
Synchronous detector multiplier
Low pass filter
(V(t-T)/V) *Acos wo (t-T)
1 bit delay
Fig.A DPSK Receiver
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83. Receiving
b(t)
V(t)
One- bit shift (delay )
V(t-T)
b(t)
V(t) V(t-T)
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84. For the signal output to be as large as possible cos wo t = + 1
Advantages of DPSK
no synchronous carrier is necessary at the receiver ( simple to implement )
Disadvantages of DPSK
An error occur in pairs in DPSK ; Pe is greater than PSK
OR DPSK ( 1-3dB) more SNR to get the same bit error rate as that of PSK . -
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