1. LIRS : An Efficient Replacement Policy to Improve Buffer Cache Performance
Song Jiang1 and Xiaodong Zhang1,2
1College of William and Mary
2National Science Foundation

2. The Problem of LRU Replacement
Inability to cope with weak access locality
File scanning: one-time accessed blocks are not replaced timely;
Loop-like accesses: blocks to be accessed soonest can be unfortunately replaced;
Accesses with distinct frequencies: Frequently accessed blocks can be unfortunately replaced.

3. Why does LRU Fail Sometimes?
A recently used block is not necessarily to be used again soon.
Can not deal with working set larger than available cache size

4. LRU Merits Simplicity: affordable implementation
Adaptability: responsive to access pattern changes

5. Our Objectives Significant efforts have been made to improve LRU, but
Case by case; or
High runtime overhead
Our objectives:
Address the limits of LRU fundamentally.
Retain the low overhead and adaptability merits of LRU.

6. Outline Related Work The LIRS Algorithm
LIRS Implementation Using LRU Stack
Performance Evaluation
Sensitivity and Overhead Analysis
Conclusions

7. Related Work Aided by user-level hints
Detection and adaptation of access regularities
Tracing and utilizing deeper history information

8. Rely on users’ understanding of data access patterns
User-level Hints
Application-controlled file caching [Cao et al, USENIX’94]
Application-informed prefetching and caching [Patterson et al, SOSP’96]
Rely on users’ understanding of data access patterns

9. Detection and Adaptation of Regularities
SEQ: sequential access pattern detection [Glass et al, Sigmetrics’97]
EELRU: on-line analysis of aggregate recency distributions of referenced blocks [Smaragdakis et al, Sigmetrics’97]
DEAR: detection of multiple block reference patterns [Choi et al, USENIX’99]
AFC: Application/File-level Characterization [Choi et al, Sigmetrics’00]
UBM: Unified Buffer Management [Kim et al, OSDI’00]
Case-by-case oriented approaches

10. Tracing and Utilizing Access History
LRFU: combine LRU and LFU [Lee et al, Sigmetrics’99]
LRU-K: replacement decision based on the time of the Kth-to-last reference [ O'Neil et al, Sigmod’93]
2Q: use two queues to quickly remove cold blocks [Johnson et al, VLDB’94]
Either high implementation cost, or
workload dependent performance

11. Outline Related Work The LIRS Algorithm
LIRS Implementation Using LRU Stack
Performance Evaluation
Sensitivity and Overhead Analysis
Conclusions

12. Observation of Data Flow in LRU Stack
Blocks are ordered by recency in the LRU stack;
Blocks enter from stack top, and leave from its bottom; 3 2 5
A block evicted from the bottom of the stack should have been evicted much earlier ! .
LRU stack 1 6

13. Inter-Reference Recency (IRR)
IRR of a block: number of other unique blocks accessed between two consecutive references to the block. Recency: number of other unique blocks accessed from last reference to the current time.
IRR = 3
R = 2

14. Principles of Our Replacement
If a block’s IRR is high, its next IRR is likely to be high again We select the blocks with high IRRs for replacement .
Once IRR is out of date, we rely on the recency.
LIRS: Low Inter-reference Recency Set Replacement Policy We keep the blocks with low IRRs in cache.

15. Basic LIRS Idea: Keep LIR Blocks in Cache
Low IRR (LIR) block and High IRR (HIR) block
Block Sets
Physical Cache
LIR block set
(size is Llirs )
Lhirs
Llirs
Cache size
L = Llirs + Lhirs
HIR block set

16. LIR block set = {A, B}, HIR block set = {C, D, E}
An Example for LIRS
Llirs=2, Lhirs=1
LIR block set = {A, B}, HIR block set = {C, D, E}

17. Mapping to Cache Llirs=2 Lhirs=1 Block Sets Physical CacheD E
HIR block set A B
LIR block set
Resident blocks
Llirs=2
Lhirs=1

18. The resident HIR block (E) is replaced !
Which Block is replaced ? Replace a HIR Block
D is referenced at time 10
The resident HIR block (E) is replaced !

19. How LIR Set is Updated ? Recency of LIR Block Used

20. After D is Referenced at Time 10
E is replaced, D enters LIR set

21. E is replaced, C can not enter LIR set
If Reference is to C at Time
E is replaced, C can not enter LIR set

22. The Power of LIRS Replacement
Capability to cope with weak access locality
File scanning: one-time accessed blocks will be replaced timely;
Loop-like accesses: blocks to be accessed soonest will NOT be replaced;
Accesses with distinct frequencies: Frequently accessed blocks will NOT be replaced.

23. Outline Related Work The LIRS Algorithm
LIRS Implementation Using LRU Stack
Performance Evaluation
Sensitivity and Overhead Analysis
Conclusions

24. LIRS Efficiency: O(1) IRR HIR Rmax
(New IRR of the HIR block)
Rmax
(Maximum Recency of LIR blocks)
This efficiency is achieved by our LIRS stack.
LRU stack + LIR block with Rmax recency in its bottom ==> LIRS stack.

25. Differences between LRU and LIRS Stacks
resident block
LIR block
HIR block
Cache size
L = 5 3 2 1 6 5
LRU stack 9 4 8
LIRS stack
Llir = 3
Lhir =2
Stack size of LRU decided by cache size, and fixed; Stack size of LIRS decided by LIR block with Rmax recncy, and varied.
LRU stack holds only resident blocks; LIRS stack holds any blocks whose recencies are no more than Rmax.
LRU stack does not distinguish “hot” and “cold” blocks in it; LIRS stack distinguishes LIR and HIR blocks in it, and dynamically maintains their statues.

26. How does LIRS Stack Help?
Rmax (Maximum Recency of LIR blocks)
IRR HIR
(New IRR of the HIR block)
LIRS Stack
Blocks in the LIRS stack ==> IRR < Rmax
Other blocks ==> IRR > Rmax

27. LIRS Operations 5 3 2 Cache size L = 5 1 6 Llir = 3 Lhir =2 9 4 8
LIRS stack S
Resident HIR Stack Q
resident in cache
LIR block
HIR block
Cache size
L = 5
Llir = 3
Lhir =2
Initialization: All the referenced blocks are given an LIR status until LIR block set is full.
We place resident HIR blocks in Stack Q
Upon accessing a LIR block (a hit)
Upon accessing a resident HIR block (a hit)
Upon accessing a non-resident HIR block (a miss)

28. Access a LIR block (a Hit)5 3 2 1 4 8 S Q 6 9 5 3 2 1 6 9 4 8 S Q 5 3 2 1 6 9 4 8 S Q
resident in cache
LIR block
HIR block
Cache size
L = 5
Llir = 3
Lhir =2
Access 4
Access 8 S d

29. Access a HIR Resident block (a Hit)5 3 2 1 4 8 S Q 3 1 4 8 S 5 Q 2 1 3 4 8 S 5 Q
resident in cache
LIR block
HIR block
Cache size
L = 5
Llir = 3
Lhir =2
Access 3
Access 5 S d

30. Access a Non-Resident HIR block (a Miss)1 3 4 8 S 5 Q 5 3 4 8 S 7 Q
resident in cache
LIR block
HIR block
Cache size
L = 5
Llir = 3
Lhir =2
Access 7

31. Access a HIR Non-Resident block (a Miss) (Cont)
resident in cache 5
block number
LIR block
HIR block
Cache size
L = 5
Llir = 3
Lhir =2 5 3 4 8 S 7 Q 7 3 4 8 S 9 Q 5 4 S Q 8 9 7 5 3
Access 9
Access 5

32. Outline Related Work The LIRS Algorithm
LIRS Implementation Using LRU Stack
Performance Evaluation
Sensitivity and Overhead Analysis
Conclusions

33. Workload Traces cpp is a GNU C compiler pre-processor trace
cs is an interactive C source program examination tool trace.
glimpse is a text information retrieval utility trace.
postgres is a trace of join queries among four relations in a relational database system
sprite is from the Sprite network file system
mulit1 is obtained by executing two workloads, cs and cpp, together.
multi2 is obtained by executing three workloads, cs, cpp, and postgres, together.

34. Representative Access patterns
Looping references: all blocks are accessed repeatedly with a regular interval;
Temporally-clustered references: blocks accessed more recently are the ones more likely to be accessed again soon.
Probabilistic references: each block has a stationary reference probability, and all blocks are accessed independently with the associated probabilities.

35. Cache Partition 1% of the cache size is for HIR blocks
99% of the cache size is for LIR blocks
Performance is not sensitive to a partition.

36. Looping Pattern: cs (Time-space map)

37. Looping Pattern: cs (Hit Rates)

38. Looping Pattern: postgres (Time-space map)

39. Looping Pattern: postgres (Hit Rates)

40. Looping Pattern: postgres (Hit Rates)

41. Probabilistic Pattern: cpp (Time-space map)

42. Probabilistic Pattern: cpp (Hit Rates)

43. Temporally-Clustered Pattern: sprite (Time-space map)

44. Temporally-Clustered Pattern: sprite (Hit Rates)

45. Mixed Pattern: multi1 (Time-space map)

46. Mixed Pattern: multi1 (Hit Rates)

47. Mixed Pattern: multi2 (Time-space map)

48. Mixed Pattern: multi2 (Hit Rates)

49. Outline Related Work The LIRS Algorithm
LIRS Implementation Using LRU Stack
Performance Evaluation
Sensitivity and Overhead Analysis
Conclusions

50. Sensitivity to the Change of Lhirs

51. Sensitivity to the Change of Lhirs

52. LIRS with Limited Stack Sizes

53. LIRS with Limited Stack Sizes

54. Conclusions
Effectively use deeper access history without explicit regularity detection and high cost operations.
Outperform exiting replacement policies.
Its implementation as simple as LRU.
Applicable to virtual memory and database buffer management.