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Floating Point Processor Condition Bit The MIPS Floating Point Accelerator (FPA) chip (now, usually part of the processor chip) has a condition bit that.

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Presentation on theme: "Floating Point Processor Condition Bit The MIPS Floating Point Accelerator (FPA) chip (now, usually part of the processor chip) has a condition bit that."— Presentation transcript:

1 Floating Point Processor Condition Bit The MIPS Floating Point Accelerator (FPA) chip (now, usually part of the processor chip) has a condition bit that is set to 0 or 1 to indicate if a condition is false or true. Several FPA instructions affect this bit and several CPU instructions test this bit. Early MIPS floating point was done on a separate chip. Special instructions were used to bridge the gap between the two chips (such as the two move instructions mtc1 and mfc1 we have already seen). Although these days there is usually just one processor chip, some of the instructions act as if the chips were separate.

2 Floating Point Comparison Instructions InstructionOperation c.eq.s fs, ftset condition bit if $fs == $ft c.lt.s fs, ftset condition bit if $fs < $ft c.le.s fs, ftset condition bit if $fs <= $ft These instructions change the value in the condition bit, a part of the processor. The condition bit is set (made equal to one) if the condition is true. Otherwise the condition bit is cleared (made equal to zero).

3 Floating Point Comparison Instructions InstructionOperation c.eq.s fs, ftset condition bit if $fs == $ft c.lt.s fs, ftset condition bit if $fs < $ft c.le.s fs, ftset condition bit if $fs <= $ft Testing if two floating point numbers are exactly equal is sometimes NOT a good idea. Floating point calculations are not exact. Sometimes values are not equal even though mathematically they should be. It is best to use "less than" or "less than or equal" instead of testing for exact equality.

4 Branch Instructions and usage InstructionOperation bc1t label branch to label if the coprocessor 1 condition bit is true ( == 1 ) bc1f label branch to label if the coprocessor 1 condition bit is false ( == 0 ) There is a branch delay slot after branch instructions. l.s $f0,A l.s $f2,B c.lt.s $f0,$f2 # is A < B? bc1t printA # yes -- print A nop c.lt.s $f2,$f0 # is B < A? bc1t printB # yes -- print B nop


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