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Lecture 41 CSE 341 – Microprocessors Lecture 4 Md. Omar Faruqe UB 1228

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Presentation on theme: "Lecture 41 CSE 341 – Microprocessors Lecture 4 Md. Omar Faruqe UB 1228"— Presentation transcript:

1 Lecture 41 CSE 341 – Microprocessors Lecture 4 Md. Omar Faruqe faruqe@bracu.ac.bd http://faculty.bracu.ac.bd/~faruqe UB 1228 faruqe@bracu.ac.bd http://faculty.bracu.ac.bd/~faruqe 1

2 Lecture 42 Delay Routines Delay Routines are very important in microcontroller based systems. Just as we saw in the labs last week, we need delay routines to be incorporated in many applications that we build using microcontroller. How do we write a simple delay routine ? We could use a dummy loop. A loop that makes the processor go in cycles inside the loop thus delaying the processor.

3 Lecture 43 Delay Routine The light needs to be toggled every 0.5 sec

4 Lecture 44 Requirements of the Routine Simple Flowchart showing the delay requirements.

5 Lecture 45 Delay Program ORG 0H JMP Main ORG 30H Main: SETB P1.0 JMP Delay CLR P1.0 JMP Delay JMP Main Delay:.. RET END

6 Lecture 46 Delay Routine NC = 1 + (1+2)*5 = 16 Cycles Let us suppose the Microprocessor is running a 1MHz. What is the time taken by each clock cycle ?.1µS So the delay produced by the above program is?16µS

7 Lecture 47 Delay Routine Remember we said that the registers were 8 bits. So what is the maximum number they can hold ?255 Calculate the delay caused by this program? Nc = 1 + (1+2)*255 = 766 Cycles As each cycles takes, 1  S, the program therefore can generate a maximum of 766  S. What would be the delay if the  P ran at 10 MHz?76.6  S.

8 Lecture 48 Delay Routine Remember we needed to generate a delay of 0.5S We found that using 1 dummy loop it is possible to generate max of 766  S. So any ideas how we can do this ? Multiple Dummy Loops !

9 Lecture 49

10 10 Delay Routines Total Number of Cycles, NC = 1 + [ 1+(1+2)*N2 + 1+2]*N1 + 2 = 1 + [ 4 + 3N2]*N1 + 2 = 3 + 4N1 + 3 N1 N2 Now if you wanted to generate a fixed delay you would have a fixed NC and you would need to calculate N1 & N2 that gives the intended NC value. This is a huge problem:  The calculation is cumbersome  It is even more harder when an application required varying delay.  The size of the register limits the maximum delay that you can have  Exact delays can be very hard to achieve

11 Lecture 411 Timers Internal Timers are very important aspects of microprocessors. 11 Internal timers can be used to provide an interrupt after a specified period of time. This is essential in the design of O/S. It is also needed in applications which requires a specific time delay. The 8051 has two 16bit timers. Timer 0 – T0 Timer 1 – T1 There are two timer functions: Counter (Can count external events) Timer (Counts machine cycle)

12 Lecture 412 Timers The timer function of the microprocessor has 4 modes (in this case) The modes have to be specified using a SFR called TMOD. The structure of TMOD is given below: To understand this in details let us examine the timer architecture.

13 Lecture 413 Timers Architecture

14 Lecture 414 Timers Gate: This acts as a switch to decide whether the timer will be controller by external interrupt or not. When Gate is set to ‘1’ the timer starts using external signals When Gate is set to ‘0’ the timer is controlled internally. When this bit is set (i.e. ‘1’), the timer may be controlled externally by 1 INT (P3.3) for timer 1 and 0 INT (P3.4). for timer 0. The timer starts when this pin is high. When the Gate bit is ‘0’, then the counter starts internally by making TR1 or TR0 set to ‘1’. T/C : This bit determines whether the internal oscillator clock or an external clock from pin T1 for timer 1 or T0 for timer 0 should be used.

15 Lecture 415 Timer Modes

16 Lecture 416 Setting up the timer TFO - Timer overflow Bit TRO - Timer Start Bit

17 Lecture 417 Writing a Timer based Delay The procedure for programming the timer is as follows: Initialization of the TMOD register Initialization of TL0 and TH0 Timer start command Monitor TF0 until set

18 Lecture 418 100  S Delay Routine So what should be the values of TH1 and TL1 if we were to achieved a 100 mS delay? 11111111 111111165535 The overflow occurs when the bits are set to 0. 65536 – 100 = 65436 FF C9 TH TL

19 Lecture 419 100  S Delay Routine

20 Lecture 420 Write a 0.5s Delay Routine?

21 Lecture 421 Questions ?


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