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Improved Regrowth of Self-Aligned Ohmic Contacts for III-V FETs North American Molecular Beam Epitaxy Conference (NAMBE),8-11-2009 Mark A. Wistey Now at.

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Presentation on theme: "Improved Regrowth of Self-Aligned Ohmic Contacts for III-V FETs North American Molecular Beam Epitaxy Conference (NAMBE),8-11-2009 Mark A. Wistey Now at."— Presentation transcript:

1 Improved Regrowth of Self-Aligned Ohmic Contacts for III-V FETs North American Molecular Beam Epitaxy Conference (NAMBE),8-11-2009 Mark A. Wistey Now at University of Notre Dame mwistey@nd.edu A.K. Baraskar, U. Singisetti, G.J. Burek, M.J.W. Rodwell, A.C. Gossard University of California Santa Barbara P. McIntyre, B. Shin, E. Kim Stanford University Funding: SRC

2 2 Wistey, NAMBE 2009 Outline: Regrown III-V FET Contacts Motivation for Self-Aligned Regrowth Facets, Gaps, Arsenic Flux and MEE MOSFET Results Conclusion

3 3 Wistey, NAMBE 2009 Motivation for Regrowth: Scalable III-V FETs Classic III-V FET (details vary): Channel Bottom Barrier InAlAs Barrier Top Barrier or Oxide Gate Low doping Gap SourceDrain Large Rc { Large Area Contacts { III-V FET with Self-Aligned Regrowth: Channel In(Ga)P Etch Stop Bottom Barrier High-k Gate n+ Regrowth High Velocity Channel Implant: straggle, short channel effects Advantages of III-V’s Disadvantages of III-V’s Small R access Small Rc Self-aligned, no gaps High doping: 10 13 cm -2 avoids source exhaustion 2D injection avoids source starvation Dopants active as-grown High mobility access regions High barrier Ultrathin 5nm doping layer }

4 4 Wistey, NAMBE 2009 MBE Regrowth: Bad at any Temperature? Low growth temperature (<400°C): – Smooth in far field – Gap near gate (“shadowing”) – No contact to channel (bad) Gate 200nm Gap Source-Drain Regrowth Source-Drain Regrowth SEMs: Uttam Singisetti Metals Channel SiO 2 high-k Gate Source-Drain Regrowth Source-Drain Regrowth Regrowth: 50nm InGaAs:Si, 5nm InAs:Si. Si=8E19/cm3, 20nm Mo, V/III=35, 0.5 µm/hr. High growth temperature (>490°C): –Selective/preferential epi on InGaAs –No gaps near gate –Rough far field –High resistance

5 5 Wistey, NAMBE 2009 560C 490C460C SiO2 dummy gate 540C No gaps, but faceting next to gates Gap High Temperature MEE: Smooth & No Gaps Smooth regrowt h Note faceting: surface kinetics, not shadowing. In=9.7E-8, Ga=5.1E-8 Torr

6 Wistey NAMBE 2009 6 Shadowing and Facet Competition [111] [100] Fast surface diffusion = slow facet growth Slow diffusion = rapid facet growth Shen & Nishinaga, JCG 1995 [111] faster [100] faster Shen JCG 1995 says: Increased As favors [111] growth SiO 2 [111] [100] Slow diffusion = fast growth Fast surface diffusion = slow facet growth SiO 2 Good fill next to gate. But gap persists

7 Wistey NAMBE 2009 7 Gate Changes Local Kinetics [100] 2. Local enrichment of III/V ratio 4. Low-angle planes grow instead sidewall 1. Excess In & Ga don’t stick to SiO 2 Diffusion of Group III’s away from gate 3. Increased surface mobility Gate SiO 2 or SiN x

8 8 Wistey, NAMBE 2009 Change of Faceting by Arsenic Flux SiO 2 W Cr Increasing As flux Original Interface InAlAs markers InGaAs 0.5x10 -6 1x10 -6 2x10 -6 5x10 -6 Lowest arsenic flux → “rising tide fill” No gaps near gate or SiO 2 /SiNx Tunable facet competition (Torr) Growth conditions: MEE, 540*C, Ga+In BEP=1.5x10 -7 Torr, InAlAs 500-540°C MBE. InGaAs layers with increasing As fluxes, separated by InAlAs.

9 9 Wistey, NAMBE 2009 Control of Facets by Arsenic Flux SiO 2 W Cr Increasing As flux Original Interface InAlAs markers InGaAs 0.5x10 -6 1x10 -6 2x10 -6 5x10 -6 Lowest arsenic flux → “rising tide fill” No gaps near gate or SiO 2 /SiNx Tunable facet competition (Torr) Growth conditions: MEE, 540*C, Ga+In BEP=1.5x10 - 7 Torr, InAlAs 500-540°C MBE. InGaAs:Si layers with increasing As fluxes, separated by InAlAs. [111] [100] SiO 2 Filling [111] [100] SiO 2 [111] [100] SiO 2 Conformal Faceting

10 10 Wistey, NAMBE 2009 Low-As Regrowth of InGaAs and InAs 4.7 nm Al 2 0 3, 5×10 12 cm -2 pulse doping In=9.7E-8, Ga=5.1E-8 Torr SEMs: Uttam Singisetti InGaAs regrowth (top view) Low As flux good for InAs too. InAs native defects are donors. Bhargava et al, APL 1997 Reduces surface depletion. InAs regrowth InGaAsInAs No faceting near gate Smooth far-field too

11 11 Wistey, NAMBE 2009 InAs Source-Drain Access Resistance 4.7 nm Al 2 0 3, InAs S/D E-FET. Upper limit: R s,max = R d,max = 370 Ω−μm. Intrinsic g mi = 0.53 mS/  m g m << 1/R s ~ 3.3 mS/μm (source-limited case) ➡ Ohmic contacts no longer limit MOSFET performance. 740 Ω-µm

12 12 Wistey, NAMBE 2009 Conclusions Reducing As flux improves filling near gate Self-aligned regrowth: a roadmap for scalable III-V FETs – Provides III-V’s with a salicide equivalent InGaAs and relaxed InAs regrown contacts – Not limited by source resistance @ 1 mA/µm – Results comparable to other III-V FETs... but now scalable

13 13 Wistey, NAMBE 2009 Acknowledgements Rodwell & Gossard Groups (UCSB): Uttam Singisetti, Greg Burek, Ashish Baraskar, Vibhor Jain... McIntyre Group (Stanford): Eunji Kim, Byungha Shin, Paul McIntyre Stemmer Group (UCSB): Joël Cagnon, Susanne Stemmer Palmstrøm Group (UCSB): Erdem Arkun, Chris Palmstrøm SRC/GRC funding UCSB Nanofab: Brian Thibeault, NSF


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