1. 9/20/6Lecture 2 - Prog Model1 MicroBaby A simple micro-controller encompassing all the basics Start this class by organizing into groups.

2. 9/20/6Lecture 2 - Prog Model2 Lecture Overview  What is MicroBaby  The architecture  Addressing modes  Instructions  Internal registers and control signals

3. What is MicroBaby?  Micro-Baby is a simple computer architecture, in fact, very simple.  All microcontrollers and microprocessors are computer architectures, in most cases fairly simple ones.  In today’s world even microcontrollers are eons beyond basic. 9/20/6Lecture 2 - Prog Model3

4. Basic assumptions  It is assumed that the reader possesses a basic understanding of the binary number system and the implementation of logic equations in digital logic using AND, OR, NAND, NOR, XOR and NOT gates.  It is also assumed that the reader also has a somewhat beyond basic understanding of computer architecture. 9/20/6Lecture 2 - Prog Model4

5. Basic styles of architecture  Micro-Baby is a accumulator based load-store architecture.  It embodies the essence of the principles of a RISC architecture.  All instruction execution results are left in the accumulator.  The accumulator based load-store architecture is the base processor architecture that all other architectures build upon 9/20/6Lecture 2 - Prog Model5

6. MicroBaby internal structure  High level and high level internal structure 9/20/6Lecture 2 - Prog Model6

7. The memory modules  Interface to the memory modules 9/20/6Lecture 2 - Prog Model7

8. The ALU  Version 1 of the alu 9/20/6Lecture 2 - Prog Model8

9. The datapath  The datapath showing the internal data bus 9/20/6Lecture 2 - Prog Model9

10. The controller  Version 2 of the conroller 9/20/6Lecture 2 - Prog Model10

11. The instructions  The instruction set  Offers the basics  Would like to have logical shift instruction  Maybe rotate 9/20/6Lecture 2 - Prog Model11

12. Debugging the controller  The controller encoding in the microcode needs debugging to insure correctness.  Note the multiple control signals need to allow the architecture to function.  Along with discussion of MU0. Groups should also become familiar with the MU0 architecture. 9/20/6Lecture 2 - Prog Model12

13. Instruction Set Simulator  An Instruction Set Simulator (ISS) simulates the operation of a computer architecture instruction by instruction, updating registers, memory, and I/O.  A modern ISS has graphical display to show the contents (values) of registers and possibly even on busses. 9/20/6Lecture 2 - Prog Model13

14. A Microbaby ISS  A Microbaby ISS will have a display that shows the value of the accumulator, the B input to the ALU, the instruction register, the temp address register in the controller, and memory. Both the data memory and the instruction memory should be displayed.  It should also be possible to show, on a cycle by cycle basis, the value on the address bus and the data bus. 9/20/6Lecture 2 - Prog Model14

15. Input and Output  The Microbaby architecture is a memory mapped I/O architecture and a few addresses of data memory will be the I/O ports.  It will be up to each group as to how this I/O is implemented and what is supported. Possibly as part of the graphical display there will a LED display. With color display to show the LEDs on/off. 9/20/6Lecture 2 - Prog Model15

16. The software structure  Graphical Display – Top level and substructure.  Update Graphical Display – update the display items of the graphical display  Executive – runs the whole ball of wax – should allow for instruction by instruction, free run, free run with breakpoints.  Instruction interpreter – disassembles the machine code into assembly language.  Memory display  I/O display  Define the assembly language specification and implement an assembler. 9/20/6Lecture 2 - Prog Model16

17. The setup  Each group will work on their own version of the system.  IT IS A COMPETITION!! The best product wins. The best get an A on the assignment. Others equal to it also get an A.  This is interesting as you set the bar. 9/20/6Lecture 2 - Prog Model17

18. By FRIDAY  For Friday Jan 22, 2016  Have a plan for your approach to the software  Know the language you are going to use.  Have the assembler language for programmer use defined.  This will be included in your first progress report, Jan 29  BY Jan 29 have the graphical interface running for the real time simulation display.  Have a good start on the assembler.  Have a good start on the simulation executive. 9/20/6Lecture 2 - Prog Model18

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22. Topics for presentation next week  Next Wednesday Jan 21st  Group 1 – Chapter 1 of text Processor architecture and organization Hardware Design Abstraction MU0 – a simple processor  Group 2 – Chapter 1 of text Processor design tradeoffs RISC – organization – advantages – drawbacks Design for low power  Discussion – compare and contrast MU0 to microbaby 9/20/6Lecture 2 - Prog Model22

23. Future topics – for Monday Jan 26  The Acorn RISC – history of deployment, more details on company development and interaction with Apple, VLSI Technology. This led to Acorn RISC Machines, Ltd. which became ARM.  Architectural inheritenance from the Berkeley RISC I and II. Details of the Berkeley RISC and its history 9/20/6Lecture 2 - Prog Model23

24. Future topics  The ARM programmer’s model – what the programmer sees. (2 presentations) - This includes what is in the datapath and the structure of memory and I/O seen. Tools for assembler language programming.  It would be nice to have a “free” simulation tool for ARM about now. ARM Sim from the University of Victoria may be the one we use.  Free textbook is available online  Also, wikipedia is a great source for information. 9/20/6Lecture 2 - Prog Model24