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ECE 353 Introduction to Microprocessor Systems Michael G. Morrow, P.E. Week 5.

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Presentation on theme: "ECE 353 Introduction to Microprocessor Systems Michael G. Morrow, P.E. Week 5."— Presentation transcript:

1 ECE 353 Introduction to Microprocessor Systems Michael G. Morrow, P.E. Week 5

2 ARM7TDMI Programming LUTs Branches and Loops Structured Programming Flowcharts Stacks Hardware versus Memory Stacks ARM7TDMI Stack Management Topics

3 Look-Up Tables In an embedded system, the code area is usually in nonvolatile memory (ROM) Data in the code area will also be placed in ROM – so the data is constant Look-up tables (LUTs) are used to translate a value from one domain to another when… There is no convenient mathematical relationship between the two domains The calculations are too expensive for the application constraints

4 LUT Examples Exercises: Write code fragments that… 1. Use a lookup table to get a 32-bit mask that will be used to clear individual bytes as directed by a 4-bit value (i.e. 2_1001 means that we want to clear the middle two bytes and preserve the most/least significant bytes) 2. Use a lookup table to get the square root of an unsigned half-word value  Disassembly fragment In both cases,  Assume that the value to convert is in R0, result in R1  Use addressing modes efficiently  Identify how large the complete data table will be

5 Branches Branches redirect program flow by loading a new PC value In many processors, a branch that does not return is called a jump ARM7TDMI branch instructions B target_address B target_address  Target_address is a label  Instruction encodes a signed 24-bit offset BX  Branch address is in a register  Can be used to jump to Thumb code Jump tables Be sure index is bounds-checked!

6 Conditional Branches and Looping Conditional branches allow program flow to change in response to conditions Action is based on current state of flags Prior instruction must be used to set flags Can use backwards conditional jumps to create a loop that can be terminated - By a condition After a predetermined number of iterations Or a combination of both Looping examples Incrementing loops Decrementing loops

7 Implementing Structured Programming Constructs Structured programming basics One entry point, one exit point per subroutine Based on three basic control structures  Sequence  Selection If, If/Else, Switch/Case  Repetition While Do-While Flowchart Basics Programming Exercise

8 Stack Implementation The stack is a LIFO data structure What is the stack used for? Two basic stack operations PUSH POP (aka PULL) Hardware stacks vs. memory stacks Hardware stack Memory stack  Stack pointer (SP)  Stack topologies and SP operation

9 ARM7TDMI Stack Operation By convention, the stack pointer is R13 ARM stack terminology Empty versus full Ascending versus descending Allocating stack space SP initialization Stack operations LDR/STR LDM/STM PUSH/POP ARM operating modes and stacks

10 Wrapping Up Homework #3 is due Wednesday, 3/7 Quiz #1 will be held Thursday, 3/1 at 7:15pm in room 2255EH Coverage will be over modules 1 and 2. Calculators are not permitted. You may have a single 3x5 card with handwritten notes. The instruction set documentation will be provided. If you have a conflict, please send me the details by email.

11 PIC16F84 Hardware Stack

12 Jump Tables start MOVR0, ???; assume index is in R0 ADRR1, jmptbl; get base address LDRR0, [R1,R0,LSL #2] ; do look-up BXR0; branch to target ; task0 ; stub NOP Bstart ; task1 ; stub NOP Bstart ; jmptbl DCDtask0, task1;...

13 B Instruction Reference Syntax B{ } RTL if (cond is true)  PC  PC + offset Flags are not affected 313029282726252423222120191817161514131211109876543210 cond1010signed_immediate_24

14 BL Instruction Reference Syntax BL{ } RTL if (cond is true)  R14  next instruction address  PC  PC + offset Flags are not affected 313029282726252423222120191817161514131211109876543210 cond1011signed_immediate_24

15 BX Instruction Reference Syntax BX{ } RTL if (cond is true)  T flag  Rm[0]  PC  Rm & 0xFFFFFFFE Flags are not affected In ARM v5 and higher, there is also a BLX instruction 313029282726252423222120191817161514131211109876543210 cond00010010SBO 0001Rm


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