1. Figure 12.39 Analog-to-digital conversion.

2. Figure 12.40 The DAC output is a staircase approximation to the original signal. Filtering removes the sharp corners. (Note: In addition to smoothing, the filter delays the signal. The delay is not shown.)

3. Figure 12.49 Output versus input for a 3-bit flash A/D converter 7Δ7Δ 6Δ6Δ 5Δ5Δ 4Δ4Δ 3Δ3Δ 2Δ2Δ 1Δ1Δ 0Δ0Δ

4. DNL (differential nonlinearity) and INL (integral nonlinearity)

5. Figure 12.41 Circuit symbol for a digital-to-analog converter.

6. Figure 12.42 DACs can be implemented using a weighted-resistance network. (Note: If d i = 1, the corresponding switch is to the right-hand side. For d i = 0, the i th switch is to the left-hand side.)

7. Figure 12.43 An R -- 2R ladder network. The resistance seen looking into each section is 2R. Thus, the reference current splits in half at each node.

8. Figure 12.44 An n-bit DAC based on the R–2R ladder network.

9. Figure 12.45 Parallel, simultaneous, or flash A/D conversion.

10. Figure 12.51a Successive approximation ADC.

11. Initially, all bits are set to 0 In step 1, the control logic sets MSB to 1 and if the comparator output is high, MSB is set back to 0, otherwise MSB remains 1 The process is repeated for the next bit. After n steps, the process is complete, and the input to the DAC is the digital code for the analog input.

12. Oversampling A/D converters E(n)=Y(n)-X(n) is defined as quantization noise, Y(n) is the quantized output and X(n) is the input. E(n) is between (-∆/2, ∆/2) Where ∆ is the quantization level. E(n) is typically approximated as an independent uniformly distributed white noise and its power spectral density is k=, fs is the sampling frequency. Therefore, increase the fs relative to the signal bandwidth will give higher resolution than Nyquist sampling converters. Even further, if oversampling is combined with noise shaping, such as in a Sigma- Delta A/D converter, then the resolution could be even higher.