1. Links from experiments to DAQ systems Jorgen Christiansen PH-ESE 1

2. Getting data into DAQ 2 CPU Switching network Front-end DAQ interface Front-end DAQ interface 1 Front-end DAQ interface N Front-end DAQ interface 2 Timing/triggers/ sync Control/monitoring VME S-link PCI-express ~zero mass Trigger Max 4T 10K – 100M rad

3. Data and Link types Readout - DAQ: Readout - DAQ: Unidirectional Unidirectional Event frames. Event frames. High rate High rate Point to point Point to point Trigger data: Trigger data: Unidirectional Unidirectional High constant data rate High constant data rate Short and constant latency Short and constant latency Point to point Point to point Detector Control System Detector Control System Bidirectional Bidirectional Low/moderate rate (“slow control”) Low/moderate rate (“slow control”) Bus/network or point to point Bus/network or point to point Timing: Clock, triggers, resets Timing: Clock, triggers, resets Precise timing (low jitter and constant latency) Precise timing (low jitter and constant latency) Low latency Low latency Fan-out network (with partitioning) Fan-out network (with partitioning) 3 We often keep these data types physically separate and each link type has its own specific implementation We often keep these data types physically separate and each link type has its own specific implementation Multiple exceptions Multiple exceptions Merge timing and control/monitoring: CMS CCU, LHCb SPECS,, Merge timing and control/monitoring: CMS CCU, LHCb SPECS,, Combine readout and control: ALICE DDL (Used for DCS ?), Combine readout and control: ALICE DDL (Used for DCS ?), Use same link implementation for readout and trigger data Use same link implementation for readout and trigger data But never have readout and trigger data on same physical link But never have readout and trigger data on same physical link Down: Control data with Timing. UP: Monitoring data with Readout: ATLAS pixel/SCT,, Down: Control data with Timing. UP: Monitoring data with Readout: ATLAS pixel/SCT,,

4. Links in ATLAS Large confined/enclosed experiment with high radiation. Large confined/enclosed experiment with high radiation. ~100KHz trigger ~100KHz trigger 4 DetectorPurposeMediaDir.Rate Mbits/s QuantityComment PixelTTC/DCS/DAQOpticalDown/up40 (80)250Custom SCTTTC/DCS/DAQOpticalDown/up408200Custom TRTTTC/DCSLVDS- Cu Down40400Custom DAQ/DCSLVDS – Optical Up40 – 1600400GOL EcalTTCOpticalDown80TTC link DCSLVDS- Cu Down/UpSPAC DAQOpticalUp1600 Glink TriggerCupperUpSub-det.Analog HcalTTCOpticalDown80TTC link DCSCupperDown/upCAN DAQOpticalUp1600512Glink TriggerCupperUpAnalog CSC, RPC, TGCDAQOpticalUp16001200Glink MDTDAQOpticalUp16001200GOL CSCTTCOpticalDown1600200Glink CSC, RPC, TGC, MDTDCSCupperDown/upCAN RPCTriggerOpticalUp1600Glink

5. Links in CMS Large confined/enclosed experiment with high radiation. Large confined/enclosed experiment with high radiation. ~100KHz trigger ~100KHz trigger 5 DetectorPurposeMediaDir.Rate Mbits/s QuantityComment Pixel - stripTTC/DCSOpticalDown/up80CCU, Custom DAQOpticalUp40Msamp ~320 40.000Custom analog EcalTTC/DCSOpticalDown/up80CCU, Custom DAQOpticalUp80011.000GOL TriggerOpticalUpGOL HcalTTCDown? DCSDown/up? DAQOpticalUp800GOL TriggerUp800GOL MuonsTTCDown DCSDown/up DAQUp800GOL TriggerUp800GOL

6. Example: CMS tracker links 6

7. Links in ALICE Low radiation levels (but can not be ignored) Low radiation levels (but can not be ignored) Specialized/qualified COTS solutions can be used Specialized/qualified COTS solutions can be used Low trigger rate (10KHz) but very large events Low trigger rate (10KHz) but very large events Standardized readout links: DDL Standardized readout links: DDL Some front-ends use directly DDL interface card (can stand limited radiation: COTS + SEU tolerance) Some front-ends use directly DDL interface card (can stand limited radiation: COTS + SEU tolerance) Others (inner trackers, TRD) use optical links (e.g. GOL) to crates that then interfaces to DDL. Others (inner trackers, TRD) use optical links (e.g. GOL) to crates that then interfaces to DDL. ~400 DDL links of 2125 Mbits/s ~400 DDL links of 2125 Mbits/s Link card plugs into PCI-X slots (must evolve with PC backplane technology) Link card plugs into PCI-X slots (must evolve with PC backplane technology) Link bidirectional so can also be used for DCS (used in practice ?) Link bidirectional so can also be used for DCS (used in practice ?) DCS: Use of single board computer with Ethernet (Very low radiation levels) DCS: Use of single board computer with Ethernet (Very low radiation levels) Trigger data: ? Trigger data: ? TTC TTC 7

8. Links in LHCb Open detector so easier to get data out Open detector so easier to get data out 1MHz trigger rate 1MHz trigger rate Came later than the other experiments and profited from link developments already made (GOL). Came later than the other experiments and profited from link developments already made (GOL). Standardized links (with 1 exception) Standardized links (with 1 exception) DAQ and trigger data: GOL 1800Mbits/s, ~5.000 Links DAQ and trigger data: GOL 1800Mbits/s, ~5.000 Links (Vertex: multiplexed analog links to counting house) (Vertex: multiplexed analog links to counting house) DCS: SPECS (Custom COTS) and CAN DCS: SPECS (Custom COTS) and CAN TTC: TTC TTC: TTC Standardized readout module: TELL1 (with 1 exception) Standardized readout module: TELL1 (with 1 exception) 8

9. What to do for the future One standardized optical link doing it all. Dream ?. We MUST try !. One standardized optical link doing it all. Dream ?. We MUST try !. Must be available early to be used/adopted by our community (but takes looong to develop). Must be available early to be used/adopted by our community (but takes looong to develop). Support for its use Support for its use Requirements: Requirements: General: General: Optical Optical Bi-directional Bi-directional High data rate: ~ 5Gbits/s (mainly from FE to DAQ) (10Gbits/s version for phase 2 ?) High data rate: ~ 5Gbits/s (mainly from FE to DAQ) (10Gbits/s version for phase 2 ?) Reliable Reliable Low and constant latency (for TTC and trigger data paths) Low and constant latency (for TTC and trigger data paths) Front-end: Radiation hard ASICs (130nm) and radiation qualified opto-electronics Front-end: Radiation hard ASICs (130nm) and radiation qualified opto-electronics Radiation hard ( >100Mrad), SEU immunity Radiation hard ( >100Mrad), SEU immunity “Low” power “Low” power Flexible front-end chip interface Flexible front-end chip interface Back-end: COTS Back-end: COTS Direct connection to high-end FPGA’s with multiple/many serial link interfaces Direct connection to high-end FPGA’s with multiple/many serial link interfaces Project : GBT ASICs, Versatile opto, FPGA firmware, GBT Link Interface Board (GLIB). Project : GBT ASICs, Versatile opto, FPGA firmware, GBT Link Interface Board (GLIB). This is one of our major projects in the PH-ESE group in collaboration with external groups to have our “dream” link ready for the upgrade community within ~1 year. This is one of our major projects in the PH-ESE group in collaboration with external groups to have our “dream” link ready for the upgrade community within ~1 year. This has been a large investment (money and manpower for the last 5 years) This has been a large investment (money and manpower for the last 5 years) 9

10. How can this look 1010 CPU Switching network Front-end DAQ interface Timing/triggers/ sync Control/monitoring ~zero mass Trigger Max 4T 10K – 100M rad DCS network GBT bi-dir links GBT uni-dir links DCS network, TTC distribution network and DAQ network Fully in counting house (COTS)

11. DAQ interface 11

12. GBT, Versatile, GLIB 12

13. Example: LHCb upgrade No trigger (40MHZ event rate), Change all front-end electronics No trigger (40MHZ event rate), Change all front-end electronics Massive use of GBT links (10k) and use of ONE flexible FPGA based ATCA board for common FE-DAQ interface, Rate control and TTC system Massive use of GBT links (10k) and use of ONE flexible FPGA based ATCA board for common FE-DAQ interface, Rate control and TTC system 13 J.P. Cachemiche, CPPM

14. Summary & Conclusions Current LHC DAQ systems Current LHC DAQ systems Front-end links not directly part of what we term(ed) (common/central) DAQ systems, but they have had a major impact on the data collection (DAQ system) architecture, detector interfaces and required system debugging. Front-end links not directly part of what we term(ed) (common/central) DAQ systems, but they have had a major impact on the data collection (DAQ system) architecture, detector interfaces and required system debugging. A large number of different links implies a large set of different front-end/DAQ interface modules. A large number of different links implies a large set of different front-end/DAQ interface modules. Each link and associated link/DAQ interface has been optimized for its specific use in each sub-detector system Each link and associated link/DAQ interface has been optimized for its specific use in each sub-detector system We tend to physically separated TTC, Slow control/monitoring, DAQ data and Trigger data information. We tend to physically separated TTC, Slow control/monitoring, DAQ data and Trigger data information. Many exceptions in different sub-systems with different mixtures. Many exceptions in different sub-systems with different mixtures. No satisfactory rad hard link existed to cover all the different needs No satisfactory rad hard link existed to cover all the different needs Future front-end links and interfaces Future front-end links and interfaces One link can carry all types of information: GBT + Versatile One link can carry all types of information: GBT + Versatile If one link fails then we completely loose everything from this detector part (but this is in practice also the case if any of the “4” distinct links fails to a detector part). Redundancy is an other (long) discussion subject. If one link fails then we completely loose everything from this detector part (but this is in practice also the case if any of the “4” distinct links fails to a detector part). Redundancy is an other (long) discussion subject. Different links/networks/fan-outs/etc. for the different information in the counting house (use of COTS) ?. Different links/networks/fan-outs/etc. for the different information in the counting house (use of COTS) ?. A “standardized” radhard high rate optical link must be available early to be adopted by our community and takes significant time and resources to develop: Start development as early as possible!. A “standardized” radhard high rate optical link must be available early to be adopted by our community and takes significant time and resources to develop: Start development as early as possible!. One type of front-end – DAQ module for all sub-detectors ? One type of front-end – DAQ module for all sub-detectors ? FPGA’s are extremely versatile and powerful (and continuously becomes even more powerful) FPGA’s now use internal standardized data busses and networks (what we before did at the crate level) FPGA’s are extremely versatile and powerful (and continuously becomes even more powerful) FPGA’s now use internal standardized data busses and networks (what we before did at the crate level) Implement final module as late as possible to profit from the latest generation technology. Implement final module as late as possible to profit from the latest generation technology. The front-end links and interface modules are vital and critical parts of DAQ/data collection systems !. The front-end links and interface modules are vital and critical parts of DAQ/data collection systems !. 14

15. Why not DAQ network interface directly in front-ends ? This is obviously what we would ideally like but: This is obviously what we would ideally like but: Complicated DAQ network interfaces (network protocol, packet routing, data retransmission, buffering, etc.) will be very hard to (build to) work reliable in hostile radiation environment. Complicated DAQ network interfaces (network protocol, packet routing, data retransmission, buffering, etc.) will be very hard to (build to) work reliable in hostile radiation environment. We can not use flexible high performance COTS components (FPGA’s, DSP, CPU, etc.) We can not use flexible high performance COTS components (FPGA’s, DSP, CPU, etc.) Power consumption Power consumption Mass Mass We can not upgrade DAQ network as hardwired into “old” front-end electronics. We can not upgrade DAQ network as hardwired into “old” front-end electronics. 15