1. 1 FVTX Monthly/Quarterly Report January 2009 Cost Summary Schedule Summary Current technical status of each WBS item

2. 2 FVTX Project Cost Summary FY08/FY09Accrued (k$) Uncosted (k$) Comments Mechanics36.830Costs to come in FY09 FPHX Design40.3101Only expect $50k more - $50k reduction Integ/Manag.67.247$47k reduction in costs: Eric Mannel no cost, LANL reduced slightly Sensor Proto88Costs in FY09 HDI workNo SOW submitted in FY08 Fixtures12.2 Sensor proto88FY08 costs in FY09 LANL manpower 89Integration, Management, Electronics design, FPHX and sensor testing

3. 3 FY09 Costs - NEW and FY08 CarryOvers, k$ Mechanics Procure267 Sensor Proto (88k procure + testing)LANL129 Sensor Procure (production)LANL423 Sensor Testing (proto + production)LANL/UNM54 Wedge Assembly (SiDet prototype work)FNAL19 FPHX IIFNAL171 FPHX Test Stands (chip testing)FNAL25 HDI (kapton proto, PCB proto, production)LANL/UNM266 ROC (pre-production proto)LANL154 FEM (pre-production proto)LANL85 Fiber19 Ancillary60 Integ/ManagLANL/Nevis206 Total1877

4. 4 Changes to Management Plan Costs Cost Savings/Increases of previous Quarters not repeated Current Expectation is that FNAL will spend ~$90k of $145k on FPHX Round I prototyping We are transferring $30k to LANL for FPHX testing, covering part of Jon K.’s salary (not used by FNAL) $30k of sensor testing funds transferred to LANL to cover Jon (covered in baseline) $40k added to design PCB-version HDI $40k for Clock and DAQ Interface boards (not explicitly called out from ROC/FEM previously, so currently include this as added cost) $37k for ROC FPGA programming and testing added $61k less spent for Electrical Integration than budgeted in MP Overall contingency remains approximately the same ($940k) as MP ($927k)

5. 5 Costs/Expenditures To Date

6. 6 Milestones Milestone description: HDI tested Forecast vs actual start/completion date: forecast Q3 FY08, actual Q2 FY09 Milestone description: Sensor Prototype tested Forecast vs actual start/completion date: forecast Q1 FY09, actual Q1/Q2 FY09 Milestone Description: First prototype wedge assembly complete. Forecast vs actual start/completion date: forecast Q1 FY09, actual Q2 FY09 Milestone Description: PHENIX system test complete. Forecast vs actual start/completion date: forecast Q1 FY09, actual Q2/Q3 FY09 Impact depends upon whether we make the second round FPHX prototype also the pre-production run and make up time, can we get FNAL design time before April Project file: Submit 2nd round FPHX - 3/25/09 Engineering run - 12/17/09

7. 7 FPHX Prototype tests LANL and FNAL analog tests of design show no deviation from design Do plan to take Tom Zimmerman’s suggestion and move components to reduce threshold dispersion Digital tests showed some beam-clock accounting problems when pulses close to clock edges Jim Hoff diagnosed problem and believe he has fix in hand. Will continue tests with prototype HDI, ROCs Discussions with Ray Yarema underway to allocate FNAL engineering time 64 channels unmasked 16 channels pulsed

8. 8 FVTX Technical Status - HDI and Sensors High Density Interconnect, UNM + LANL Kapton HDI has been delivered to assembly facility, fully completed and delivered by ~mid- February HDI PCB version design completed - 6 ordered with 7-day delivery (28-Jan) Plan to bond few chips to HDI and test with/without sensor

9. 9 FVTX Technical Status - Sensors 17 sensors delivered - fewer than requested because of some production malfunction. Hamamatsu test results examined - sensors within specs UNM tests underway shortly (small hiccup in probe station and probe connections needed).

10. 10 FVTX Technical Status - DAQ FPGA Evaluation board plus USB/NI/FPHX interface for testing until a ROC is available. LANL interface board FPGA Eval board ROC board delivered to LANL Some 0-ohm resistors mis-placed which shorted LV power, but easily fixed One remaining power-up issue under examination FPGA code available for testing with FPHX chips Interface to single-chip FPHX available FVTX ROC design in progress FEM in progress

11. 11 FVTX Technical Status - Assembly SiDet will assemble first kapton and PCB HDI wedges Fixtures received and tested at FNAL, few slight modifications suggested (but usable as-is) Assembly preparation work at BNL continues Rapid-prototype cage and disks to be purchased HDI Sensor FPHX chip bonded to HDI Backplane Rigid, thermally conductive epoxy Rigid epoxy Chips placed on HDI Sensor inserted

12. 12 Summary FPHX, sensor tests LANL/Tom Zimmerman analog tests completed and no major issues Some issues with beam clock output on large events Sensor testing looks good to date (strip numbering missing only small issue) Wedge tests Should begin in February with PCB HDI, kapton HDI wedges in mid-late Feb SiDet tested assembly process, small mods to chip placement especially ROC/FEM Roc prototype testing underway Prototype ROC will be used for wedge tests FEM still behind schedule, but not on critical path Mechanics on track