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Clock and Trigger T. Blažek, V. Černý, M. Kovaľ, R. Lietava Comenius University Bratislava M. Krivda University of Birmingham.

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Presentation on theme: "Clock and Trigger T. Blažek, V. Černý, M. Kovaľ, R. Lietava Comenius University Bratislava M. Krivda University of Birmingham."— Presentation transcript:

1 Clock and Trigger T. Blažek, V. Černý, M. Kovaľ, R. Lietava Comenius University Bratislava M. Krivda University of Birmingham

2 Outline LTU board modification for technical run New CHOKE/ERROR cables (RJ11-RJ45) LTU firmware update – version 17 – snapshot memory support – new emulation state machine SoB/EoB support trigger counter LTU software update (with short how-to) TTCex news TTC system for NA6206/02/2013

3 Clock distribution and data flow 15/12/20103 LTU + TTCex LTU + TTCex LTU + TTCex LTU + TTCex 40 MHz clock source....................... TTC partition TTCrx Trigger inputs For jitter < 50 ps RMS QPLL must be used ! QPLL FEE CHOKE/ ERROR Triggers TTC Clock + Triggers Sync. card L0TP

4 Clock distribution and data flow 15/12/20104 LTU + TTCex LTU + TTCex LTU + TTCex LTU + TTCex 40 MHz clock source....................... TTC partition TTCrx Trigger inputs For jitter < 50 ps RMS QPLL must be used ! QPLL FEE CHOKE/ ERROR Triggers TTC Clock + Triggers Sync. card L0TP...................

5 LVDS receivers (data from L0TP) - termination resistors removed 6 LVDS receivers have the same LVDS driver, so termination resistors must be only at the last receiver Termination resistors are removed from first 5 LTU boards Only last LTU board has termination resistors 06/02/2013TTC system for NA62 All LTU boards with removed termination resistors are marked with sticker “termination resistors removed”.

6 SoB and EoB inputs – front panel TTC system for NA62 SPARE input (default ECL) used for SoB – 6 LTU boards in NA62 cavern are modified for NIM level SPARE input (default ECL) used for EoB - 6 LTU boards in NA62 cavern are modified for NIM level 06/02/2013 All LTU boards which are modified for SoB,EoB NIM inputs are marked with sticker “SoB,EoB – NIM input”

7 CHOKE/ERROR cables (RJ11->RJ45) Problem discovered at RJ11 connection, now fixed – RJ11 socket from different manufacturer as RJ11 plug – a little bit different shape (1 mm less in one corner) was enough to break connection between socket and plug Small converters RJ11->RJ45 (not ideal solution) replaced by cable with different plugs (RJ11, RJ45) on both ends – RJ11 plug ordered from the same manufacturer as RJ11 socket 06/02/2013TTC system for NA62 RJ11 plug is MOLEX - 90075-0027 We have produce 6 cables with RJ11->RJ45 plugs We will produce extra 6 cables Is anybody interested to have such cable in lab ?

8 LTU firmware update snapshot memory (SSM) – records 26 ms of LTU incoming/outgoing signals New emulation state machine –> complete redesign – Allows to send complete sequence SoB signal, SoB trigger, Triggers, EoB signal, EoB trigger – SoB trigger A-bit timing issue found and resolved thanks to TEL62 feedback (Franco Spinella et al.) – new counter functionality – predefined number of triggers can be sent in each burst TTC system for NA6206/02/2013

9 New emulation state machine s0: Idle state; wait for EMU_START s1: L0 counter reset s2: Wait for SoB (signal) s3: send SoB trigger s4: One BC cycle delay between read address clear or increment and memory data load s5: Load sequence parameters (Trigger word 0) s6: Wait for START (BC,RND,PLSR) s7: Generate L0 + L0 data s8: Wait for the end of serial stream s9: Decision in which way to continue with emulation – if(quit_emu | eob_reg | (l0_counter_for_emu_en & (l0_counter >= l0_number))) emu_state <= s13; //-- go to EoB – else if(seq_first) emu_state <= s11; //-- go to first trigger word – else if(seq_next) emu_state <= s10; //-- go to next trigger word s10: Start next trigger word s11: Clear Word Address s12: Start after break ( the break not implemented jet ) s13: Wait for EoB (signal) s14: send EoB trigger TTC system for NA6206/02/2013

10 LTU software TTC system for NA62 new emulation snapshot memory switch Standalone ↔ Global mode 06/02/2013

11 LTU emulation TTC system for NA62 trigger list in SLM open SLM editor start signal emulation mode SoB EoB options Option selectors Option values start emulation quit emulation 06/02/2013

12 Trigger list editor edit 6-bit messages to be sent during emulation add decimal numbers last item must have flag restart read tooltips (hover pointer over a GUI item without clicking) TTC system for NA6206/02/2013

13 Start signal selection – trigger timing Scaled BCperiod between triggers = number in text field × BC clock period (25 ns) Randomperiod between triggers = random with mean value (number in the text field) Pulser Leveltrigger is sent when external pulser level is “up” Pulser Edgetrigger is sent with rising edge of external pulser Soft Onlytrigger is sent only after “SoftTrigger” button is pushed TTC system for NA6206/02/2013

14 Emulation modes Plain emulation - send triggers continuously Counter - send predefined number of triggers SoB EoB - emulation machine waits for SoB signal to start sending triggers - after EoB signal, it waits again for SoB - see next slide for SoB/EoB signals options SoB EoB with counter - specified number of triggers is sent in each burst TTC system for NA6206/02/2013

15 SoB EoB options TTC system for NA62 SoB EoB manualsignals are fired by pushing buttons in Emulate window SoB EoB front panelsignals are taken from front panel SoB EoB periodic signals are fired by software periodically with burst duration and period specified in text fields (in seconds) 06/02/2013

16 LTU SSM records 26 ms of signals in LTU – similar to TTCit SSM A column – outgoing 1 bit L0-accept message B column – outgoing serialized B-messages (orange coloured 8 bits) in the screenshot: SoB trigger A-bit + 10001000 B-message TTC system for NA6206/02/2013

17 LTU SSM records 26 ms of signals in the LTU A column – outgoing 1 bit L0-accept message B column – outgoing serialized B-messages (orange coloured 8 bits) in the screenshot: SoB trigger A-bit + 10001000 B-message TTC system for NA6206/02/2013

18 TTCex collected 7 of 9 “temporary” TTCex MKII boards located at CERN and replaced them with new MKI: – MKII MKI – CEDAR (2L) SN7 -> SN26 (2L) – LAV (10L) SN9 -> SN29 (10L) – STRAW (4L) SN13 -> SN18 (4L) – CHANTI (10L) SN18 -> SN21 (10L) – LKR/0 (6L) SN11 -> to be exchanged – MUV (10L) SN15 -> SN11 (10L) – TDAQ (4L) SN23 -> SN25 (4L) – TDAQ (4L) SN3 -> to be exchanged à – SPARE(4L) SN8 -> SN8 (4L) 2 TTCex boards located in Pisa and Roma should be brought back to CERN asap. I will install new TTCex boards in NA62 cavern this week LTU new TTCex - timing must be checked 06/02/2013TTC system for NA62

19 TTCex 06/02/2013TTC system for NA62

20 TTCex MKI ver.2 06/02/2013TTC system for NA62 Old type of front panel Old type of PLL New type of lasers

21 LTU & TTCit software https://twiki.cern.ch/twiki/bin/viewauth/NA62/LTUrelatedSoftware – check for updates – download latest firmware and software – installation and user manuals – any feedback is highly appreciated at: Vladimir.Cerny@cern.ch Michal.Koval@cern.ch Marian.Krivda@cern.ch (firmware) TTC system for NA6206/02/2013

22 Conclusions New firmware (ver.17) and software tested in our lab and also in Pisa lab (by Franco) Verified: – new emulation state machine including all emulation modes – SoB/EoB signal to SoB/EoB trigger timing – SSM functionality CHOKE/ERROR triggers will be in next version Replacement of TTCex boards under way TTC system for NA6206/02/2013

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