1. doc.: IEEE 802.11-04/992r1 Submission September, 2004 Victor Stolpman et. al Irregular Structured LDPC Codes and Structured Puncturing Victor Stolpman, Nico van Waes, Tejas Bhatt, Charlie Zhang, and Amitabh Dixit This presentation accompanies submission IEEE 802.11-04/948r1

2. doc.: IEEE 802.11-04/992r1 Submission September, 2004 Victor Stolpman et. al Parity-Check “Seed” Matrix Small binary matrix  low storage costs. Acts as a blueprint to the structure of the expanded LDPC code. Constructed from an ensemble with good asymptotic properties for the desired channel (e.g. AWGN, BEC, Fading, MIMO, etc.). Expanded using permutation matrices (e.g. single circular-shift) to construct the LDPC matrix used in the error control system. After expansion, final LDPC matrix will be of the same ensemble. Storage is smaller than the storage of exponents. For example purposes only, a seed matrix:

3. doc.: IEEE 802.11-04/992r1 Submission September, 2004 Victor Stolpman et. al Permutation “Spread” Matrices Finite set of matrices consisting of circular-shift matrices, the identity matrix, and the all zeros matrix. Indexed via their exponent values.

4. doc.: IEEE 802.11-04/992r1 Submission September, 2004 Victor Stolpman et. al Expanded LDPC Matrix “Expanded” LDPC matrix whose sub-matrices belong to the finite set of permutation matrices In matrix notation, we write Thus, the final exponents are of the finite set:

5. doc.: IEEE 802.11-04/992r1 Submission September, 2004 Victor Stolpman et. al Universal Exponential Matrix Exponential matrix definition used for all LDPC code constructions despite the ensemble and seed construction dimension. Because it is “rule-based” and not tied to a particular “seed” matrix construction, it offers forward-compatibility and hardware reuse for different products and standards. Adapts for multiple block sizes and code rates without additional storage for exponent values. Applicable to different ensembles designed for different channels.

6. doc.: IEEE 802.11-04/992r1 Submission September, 2004 Victor Stolpman et. al Final Exponential Matrix Constructed via masking the “seed” matrix with the “universal” exponent matrix (Note: operations can be reduced to just the ones locations in the seed parity-check matrix). Using the following mapping:

7. doc.: IEEE 802.11-04/992r1 Submission September, 2004 Victor Stolpman et. al Small Construction Example Parity Systematic

8. doc.: IEEE 802.11-04/992r1 Submission September, 2004 Victor Stolpman et. al Simulations Simulated Block Sizes: –{576,720, 768, 864, 960, 1008, 1152, 1296, 1344, 1440, 1536, 1584, 1728, 1872, 1920, 2016, 2112, 2160, 2304} Permutation sub-matrix dimensions: –{12,15,16,18,20,21,24,27,28,30,32,33,36,39,40,42,44,45,48} Rate 1/2 Seed Matrices of dimension (24x48) –3 seed matrices (designed for AWGN – all 3 from the same ensemble) Rate 2/3 Seed Matrices of dimension (16x48) –4 seed matrices (designed for AWGN – all 4 from the same ensemble) Rate 3/4 Seed Matrices of dimension (12x48) –4 Seed matrices (designed for AWGN – all 3 from the same ensemble) 50 iterations of conventional belief propagation In the pipeline … –Rate 7/8 Seed Matrices –Additional block sizes (forward-compatibility and hardware reuse) –Additional Layered Belief-Propagation decoding

9. doc.: IEEE 802.11-04/992r1 Submission September, 2004 Victor Stolpman et. al Rate 1/2 BLER – AWGN BPSK

10. doc.: IEEE 802.11-04/992r1 Submission September, 2004 Victor Stolpman et. al Rate 2/3 BLER – AWGN BPSK

11. doc.: IEEE 802.11-04/992r1 Submission September, 2004 Victor Stolpman et. al Rate 3/4 BLER – AWGN BPSK

12. doc.: IEEE 802.11-04/992r1 Submission September, 2004 Victor Stolpman et. al Layered v/s Conventional BP (Rate 1/2) Layered BP (15 iterations) Conventional BP (50 iterations)

13. doc.: IEEE 802.11-04/992r1 Submission September, 2004 Victor Stolpman et. al LDPC, N=1920, Different Code-Rates

14. doc.: IEEE 802.11-04/992r1 Submission September, 2004 Victor Stolpman et. al LDPC, N=1920, R-1/2

15. doc.: IEEE 802.11-04/992r1 Submission September, 2004 Victor Stolpman et. al Channel B 2x2 Simulation Results (to be revised before meeting)

16. doc.: IEEE 802.11-04/992r1 Submission September, 2004 Victor Stolpman et. al Channel D 1x1 Simulation Results (to be revised before meeting)

17. doc.: IEEE 802.11-04/992r1 Submission September, 2004 Victor Stolpman et. al Channel E 1x1 Simulation Results (to be revised before meeting)

18. doc.: IEEE 802.11-04/992r1 Submission September, 2004 Victor Stolpman et. al Features Supports a wide range of block sizes without shortening –Shortening causes some inefficiencies with hardware: Must shorten a longer codeword in decoding than needed Power consumption and/or performance may vary with block size Shortening rules continue to propagate in future systems Upper triangular seed matrices  linear time encoder Wide range of block sizes reduces zero-padding inefficiencies Supports ensembles designed for different channel models Future compatibility and hardware reuse going forward –Additional block sizes are easily added for advancements in silicon –Additional ensembles are easily added for difference channel models Layered Belief-Propagation decoding can be done to speed up convergence and reduce decoding latency

19. doc.: IEEE 802.11-04/992r1 Submission September, 2004 Victor Stolpman et. al Summary Irregular Structure LDPC Codes –Applicable to seed matrices designed for different channels and antenna configurations (i.e. AWGN, BEC, fading, SISO, MIMO, etc.). –“Rule-based” exponent reduces storage requirements because only seed matrices need to be stored and not exponents. –Reusable hardware for different channel models and product lines. –Performance is in line with other structured approaches customized for specific channels. Structured Puncturing of LDPC Codes –A change in code rate does not require a change of connective nets in either the encoder or decoder. –Can work with different ensembles of different rates. –Allows for simple link adaptation and can easily support different code rates for separate spatial streams in MIMO antenna configurations. –Can reuse hardware for different error control applications. –Can coexist with other code rate adaptation approaches (e.g. nested matrices, shortening, etc.).