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FPGA-Based System Design: Chapter 7 Copyright  2004 Prentice Hall PTR Topics n Multi-FPGA systems.

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Presentation on theme: "FPGA-Based System Design: Chapter 7 Copyright  2004 Prentice Hall PTR Topics n Multi-FPGA systems."— Presentation transcript:

1 FPGA-Based System Design: Chapter 7 Copyright  2004 Prentice Hall PTR Topics n Multi-FPGA systems.

2 FPGA-Based System Design: Chapter 7 Copyright  2004 Prentice Hall PTR Issues n Types of multi-FPGA systems. n Multi-FPGA networks. n Multi-FPGA partitioning.

3 FPGA-Based System Design: Chapter 7 Copyright  2004 Prentice Hall PTR Types of systems n Can build a specialized multi-FPGA system. –Wired for one purpose. n Can build reusable multi-FPGA system. –Emulators, other debugging systems.

4 FPGA-Based System Design: Chapter 7 Copyright  2004 Prentice Hall PTR Networks n Ad hoc. –Best suited for specialized systems. n Crossbar. –Fully connected. n Specialized crossbars. n Multi-stage. –Not often used in multi-FPGA systems.

5 FPGA-Based System Design: Chapter 7 Copyright  2004 Prentice Hall PTR Crossbar n Fully connected: abcd w x y z

6 FPGA-Based System Design: Chapter 7 Copyright  2004 Prentice Hall PTR Properties of crossbar n Fully connected: –Single source/destination. –Multi-point. n n 2 area.

7 FPGA-Based System Design: Chapter 7 Copyright  2004 Prentice Hall PTR Clos network n System of crossbars that has less than n 2 area. n Fully connected for single-destination connections. –Not fully connected for multiple destinations.

8 FPGA-Based System Design: Chapter 7 Copyright  2004 Prentice Hall PTR Clos network organization

9 FPGA-Based System Design: Chapter 7 Copyright  2004 Prentice Hall PTR Net size distribution n Most nets are small, making Clos network feasible for logic: # pins # nets 123

10 FPGA-Based System Design: Chapter 7 Copyright  2004 Prentice Hall PTR Partial crossbar n Takes advantage of FPGA reprogrammability. n Several small crossbars. –If your crossbar doesn’t have room for the connection, reprogram to use another crossbar on another pin.

11 FPGA-Based System Design: Chapter 7 Copyright  2004 Prentice Hall PTR Trees and fat trees n Trees allow communication between leaves. n Fat trees provide more bandwidth near root. …

12 FPGA-Based System Design: Chapter 7 Copyright  2004 Prentice Hall PTR Multi-chip partitioning n Somewhat similar to partitioning for LE placement. n Differences: –k-way partitioning; –pins are a major cost; –must handle large problems.

13 FPGA-Based System Design: Chapter 7 Copyright  2004 Prentice Hall PTR K-way partitioning n Direct: –Divide into k sets. n Iterative: –Extract one set, then another, etc.

14 FPGA-Based System Design: Chapter 7 Copyright  2004 Prentice Hall PTR Clustering-based partitioning n Grow a cluster to form a partition. –Start with a seed for the cluster. –Choose new nodes to add to the cluster. n Next move depends on the quality of the previous moves.

15 FPGA-Based System Design: Chapter 7 Copyright  2004 Prentice Hall PTR Fiduccia-Mattheyses partitioning n Can deal with variable-sized blocks. n Related to Kernighan-Lin partitioning. –Uses a new data structure to determine the best cell to move. n Uses an improved algorithm for updating cell gains after a move. –Total gain recomputation can be performed by a set of constant time gain increments/decrements.


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