1. CERN Detector Seminar 1 CMOS sensors Ivan Perić

2. CERN Detector Seminar 2 Introduction

3. CERN Detector Seminar ASIC-Design and Detector Technology Group at the Karlsruhe Institute for Technology KIT = unified University of Karlsruhe and the Research Centre Karlsruhe University of Karlsruhe Research Centre Karlsruhe

4. CERN Detector Seminar Neutrino Experiment KATRIN, synchrotron source ANKA, proton irradiation facility KATRIN ANKA

5. CERN Detector Seminar IPE – Institute for Data Processing and Electronics Auger Telescope 3D ultrasound imager

6. CERN Detector Seminar Studies: Electrical Engineering at the University of Belgrade in Serbia PhD studies: Bonn University of Mannheim, Heidelberg, KIT Research themes Pixel readout chip for ATLAS – FEI3 Design of high voltage driver- and readout chips for the DEPFET detector (Belle II KEK) Hybrid sensors for medical imaging SiPM readout for PET HVCMOS sensors PETMu3e (HVCMOS) Belle II PXD CIX ROC

7. CERN Detector Seminar 7 CMOS

8. CERN Detector Seminar CMOS The CMOS stays for the complementary metal oxide semiconductor transistor A type of field effect transistor. Idea since 1925 by Julius Edgar Lilienfeld - change of the conduction in presence of E-field First MOSFET was realized in 1959 Dawon Kahng and Martin M. Atalla. First MOSFET

9. CERN Detector Seminar MOS technology With development of ICs the MOSFET took the main role in electronics We are already producing 10 18 transistors per year - enough to supply every ant on the planet with ten transistors. Twenty years from now, if the trend continues, there will be more transistors than there will be cells in the total number of human bodies on Earth First IC - Kilby Planar IC Noyce CMOS IC First microprocessor Modern intel processor

10. CERN Detector Seminar 10 CMOS Sensors

11. CERN Detector Seminar Principle of CMOS sensors (Eric R. Fossum et all. IEEE transactions on electron devices. vol. 41, no. 3, march 1994) Sensor element - a pn junction N-region (called n-well or n-diffusion) in a p-substrate Potential well for electrons In some implementation n-region is entirely depleted -pinned photodiode Samsung 32nm process

12. CERN Detector Seminar PN junction as sensor of radiation The pn-junction is reversely biased - depleted region, potential change, here depicted as the slope 1. step - ionization Atoms Photons or particles Ionisation Free e-

13. CERN Detector Seminar PN junction as sensor of radiation 2. step – charge collection Two possibilities for charge collection – drift (through E-force) and by diffusion (density gradient) Atoms Collection of electrons

14. CERN Detector Seminar PN junction as sensor of radiation 3. step – charge to voltage conversion Collection of the charge signal leads to the potential change AtomsPotential change

15. CERN Detector Seminar MOS technology CMOS imaging sensors,or CMOS pixel sensors, almost always contain at least one transistor inside a pixel. This transistor is acting as an amplifier

16. CERN Detector Seminar CMOS pixel Connection between the n-region (charge collecting electrode) and the gate of the transistor N-type region Diffusion (shallow) Or well (deep) Sensor-junction MOS FET Sensor-junction MOS FET Gate

17. CERN Detector Seminar CMOS pixel N in P diode acts as sensor element – signal collection electrode N-type region Diffusion (shallow) Or well (deep) Sensor-junction MOS FET Sensor-junction MOS FET Gate

18. CERN Detector Seminar CMOS pixel Charge generated by ionization is collected by the N-diffusion This leads to the potential change of the N-diffusion The potential change is transferred to transistor gate – it modulates the transistor current A small charge generated by particles or photons produces much larger current flow or current change N-type region Diffusion (shallow) Or well (deep) Sensor-junction MOS FET Sensor-junction MOS FET Gate

19. CERN Detector Seminar 19 Drift and Diffusion

20. CERN Detector Seminar CMOS pixel Charge generated in depletion region Charges experience high field and holes are separated from electrons. Electrons move by drift and are collected by the n-region N-type region Diffusion (shallow) Or well (deep) Sensor-junction MOS FET Sensor-junction MOS FET Gate

21. CERN Detector Seminar CMOS pixel Partial signal collection in the regions without E-field

22. CERN Detector Seminar CMOS pixel Partial signal collection in the regions without E-field Recombination

23. CERN Detector Seminar CMOS pixel Partial signal collection in the regions without E-field Recombination

24. CERN Detector Seminar CMOS pixel Partial signal collection in the regions without E-field Charge collection by diffusion

25. CERN Detector Seminar CMOS pixel Partial signal collection in the regions without E-field Charge collection by diffusion

26. CERN Detector Seminar Differences versus the CCDs: In CMOS, there is a charge to voltage conversion in every pixel. This conversion occurs at the collection electrode Important parameter: the capacitance of the collection electrode (detector capacitance) Active element (amplifier) in every pixel The output signal of the CMOS pixel is already amplified. CCD pixel output -> original signal CMOS signal is stronger, but Output signal may be distorted by imperfect charge to voltage conversion and amplification. Noise in time and space (mismatch or FPN) Nonlinearity Canon 120 M pixels, 2um pixel sizeTeledyne DALSA 60 M pixels CCD, 6um pixel size 29 mm 54 mm

27. CERN Detector Seminar MOS technology If the detector capacitance is smaller, the gain of the pixels is bigger and the sensor SNR is better

28. CERN Detector Seminar Differences between CMOS imaging sensors and CMOS particle sensors CMOS imaging sensors are now the mostly used sensor type for digital cameras Rolling shutter principle A AAAAA Switch Pixel i+1 Pixel i Periphery of the chip

29. CERN Detector Seminar Pixels of the same column share the same column line. The gates of the switches are connected row-wise For the readout of whole matrix we need n steps, where n is the number of rows. Proper concept for imaging A AAAAA Switch Pixel i+1 Pixel i Periphery of the chip

30. CERN Detector Seminar 30 CMOS Sensors for Particle Physics

31. CERN Detector Seminar 31 Frame readout - Simple pixels - Signal and leakage current is collected - No time information is attached to hits - The whole frames are readout Small pixels Low power consumption Slow readout Rolling shutter is not always the optimal readout concept for particle physics, although there are many CMOS particle sensors that work in this way

32. CERN Detector Seminar 32 Sparse readout 6 9 9 3 6 9 9 3 - Intelligent pixels - FPN is tuned inside pixels - Leakage current is compensated - Hit detection on pixel level - Time information is attached to hits  Larger pixels  Larger power consumption Fast (trigger based) readout Particle tracking: To measure the time and the position of particle hit. Particles produce enough charge and can be distinguished from the noise In the case of LHC experiments, the required time resolution is 25ns.

33. CERN Detector Seminar Imaging sensors: efficiency 80% ok Particle sensors: efficiency >99% required

34. CERN Detector Seminar Solution - smart pixels Output is the time information of the particle hit Output of the CCD-pixel - collected charge Output of CMOS imaging sensor pixel - amplified charge signal Output of CMOS particle sensor pixel (a smart pixel) - time information of (the triggered) hit

35. CERN Detector Seminar A complex signal processing requires many (>2,3) transistors Both CMOS transistor types – n-channel and p-channel are required Complication: PMOS is placed in a local n-substrate (n-well). N-well is placed in the p-substrate. The same p- substrate is used as sensor volume N-well and the collecting electrode are competing –> charge loss

36. CERN Detector Seminar 36 CMOS Sensors Types

37. CERN Detector Seminar 37 MAPS

38. CERN Detector Seminar 38 MOS pixel sensor with 100% fill factor - MAPS MAPS NMOS transistor in p-wellN-well (collecting region) Pixel i Charge collection (diffusion) P-type epi-layer P-type substrateEnergy (e-) The collection electrode is near the electronics. The charge collection is by diffusion. Standard process. Disadvantage: introduction of PMOS transistors lead to a charge loss Radiation tolerance Still, very successful

39. CERN Detector Seminar MAPS IPHC Strasbourg (PICSEL group) Family of MIMOSA chips Applications:, STAR-detector (RHIC Brookhaven), Eudet beam-telescope http://www.iphc.cnrs.fr/Monolithic-Active-Pixel-Sensors.html

40. CERN Detector Seminar MAPS http://www.iphc.cnrs.fr/Monolithic-Active-Pixel-Sensors.html Ultimate chip for STAR MIMOSA 26 for Eudet telescope Although based on simple MAPS principle – epi layer and NMOS electronics – MIMOSA chips use more complex pixel electronics Continuous reset and double correlated sampling

41. CERN Detector Seminar MAPS structure with CMOS pixel electronics If PMOS transistors are introduced, signal loss can happen NMOS transistor in p-well N-well (collecting region) Pixel i P-type epi-layer P-type substrateEnergy (e-) MAPS with a PMOS transistor in pixel PMOS transistor in n-well Signal collection Signal loss

42. CERN Detector Seminar 42 INMAPS NMOS shielded by a deep p-well PMOS in a shallow p-well N-well (collecting region) Pixel P-doped epi layer INMPAS Deep P-layer is introduced to shield the PMOS transistors from epi layer No charge loss occurs Not a CMOS standard process Disadvantages are slow charge collection by diffusion and less radiation tolerance. Another disadvantage is very limited number of producers and non-standard CMOS process

43. CERN Detector Seminar INMPAS INMAPS Tower Jazz process is gaining popularity in particle physics community It was originally developed by the foundry and the Detector Systems Centre, Rutherford Appleton Laboratory 2 Megapixels, large area sensor Designed for high-dynamic range X-ray imaging 40 µm pixel pitch 1350 x 1350 active pixels in focal plane Analogue readout Region-of-Reset setting 140 dB dynamic range 20 frames per second FORTIS chip http://dsc.stfc.ac.uk/Capabilities/CMOS+Sensors+Design/Follow +us/19816.aspx

44. CERN Detector Seminar INMPAS Detector Systems Centre, Rutherford Appleton Laboratory – some examples http://dsc.stfc.ac.uk/Capabilities/CMOS+Sensors+Design/Follow +us/19816.aspx Wafer scale 120 x 145 mm chip for medical imaging

45. CERN Detector Seminar 45 Depleted CMOS

46. CERN Detector Seminar 46 Depleted INMAPS - HRCMOS In depleted sensors charge is collected by drift -> faster signals One of the first ideas is described in the PhD thesis of Walter Snoyes: „A new integrated pixel detector for high energy physics“

47. CERN Detector Seminar 47 Depleted INMAPS NMOS shielded by a deep p-well PMOS in a shallow p-well N-well (collecting region) Pixel Improved version of INMAPS. Here a high voltage is used partially deplete the region underneath the electronics. Nonstandard CMOS

48. CERN Detector Seminar 48 Depleted INMAPS Application: ALICE Upgrade

49. CERN Detector Seminar 49 SOI technology Sensor part and the electronics are separated by oxide. The sensor has the form of a matrix of pn junctions, the collecting regions are p-type diffusion implants in the n-substrate. A connection through the buried oxide is made to connect the readout electronics with electrodes. SOI sensors are can use CMOS, the charge collection is based on drift. The disadvantage is a complex process. Hi res. N-type substrate Electronics layer Buried oxide Connection Energy (h+) CMOS pixel electronics P+ collecting electrode Originally developed at University of Krakow The development continued in collaboration with industry (OKI and Lapis) The collaboration is now led by KEK, Japan

50. CERN Detector Seminar 50 SOI technology SOI technology can be used for x-ray detection thanks to its thick sensitive region Example of an x-ray detector: INTPIX4 15.4 mm 10.2 mm

51. CERN Detector Seminar 51 HVCMOS

52. CERN Detector Seminar 52 HVCMOS (HVMAPS) HVCMOS is an attempt to implement CMOS depleted sensors in a standard process. HVCMOS uses one trick; the electronics is placed directly inside the collecting electrode. Transistors sense the tiny voltage change in their environment Since electronics is placed in the n-well the substrate is decoupled from the electronics It can be put on high negative potential and a large drift field is induced. This makes HVCMOS sensors very radiation tolerant. HVCMOS are based on a standard process. They are therefore cheap P-Substrat Verarmungszone “Smart” Diode n-Wanne Pixel “Smart diode” Detector DriftPotentialenergie (e-)

53. CERN Detector Seminar 3D layout of a “smart diode” 40 µm 3D layout generated by GDS2POV software

54. CERN Detector Seminar 54 Further improvements of HVCMOS Substrates of higher resistivity can be used to increase the depleted region size Deep-n-well +- Deep-n-well +- Particle

55. CERN Detector Seminar 55 Further improvements of HVCMOS Substrates of higher resistivity can be used to increase the depleted region size Better PMOS isolation

56. CERN Detector Seminar 56 HV CMOS detectors developed by our group CAPSENS (0.35HV/0.18) HVPixel1 (H35) HVPixel2 (CCPD) HVPixelM (H35) Hpixel (H18) SDS (65nm) MuPix1/2 (H18) MuPix3-6 (H18) CCPD1-4 (H18) CLIICPIXS (H18) H35CCPD (H35) HVStrip (H35) R&D developments Smart and simple pixels H35 Technology R&D developments H18 and 65nm technology MU3e Development ATLAS Pixel Development CCPD (H18) CLIC Development (H18) ATLAS Pixel Development (H35) ATLAS Strip Development (H35) 2006 99% efficiency Thinned chips Irradiated chip

57. CERN Detector Seminar 57 The development of HVCMOS sensors started as a small project. Now they are developed within several collaborations: Mu3e collaboration (Heidelberg, PSI, KIT, University ETH Zuerich) ATLAS CMOS demonstrator collaboration ATLAS CMOS strip collaboration CLIC detector R&D group ATLAS HVMAPS collaboration

58. CERN Detector Seminar 58 CLIC

59. CERN Detector Seminar 59 CLIC 25um x 25um HVCMOS pixels. The sensor is capacitively coupled to the CLIC pix ASIC Good results - detection efficiency is better than 99%. The pixels on the CLIC HVCMOS contain only amplifiers – the output is analog. Readout pixel Size: 25 µm x 25 µm CCPD Sensor for CLIC Test beam results

60. CERN Detector Seminar 60 Mu3e

61. CERN Detector Seminar 61 The Mu3e is a proposed experiment at PSI. Search for the muon decay to three electrons The Mu3e detector should consist of three pixel layers with a total area of 2m 2. Low electron momentum -> thin detectors are required. Time resolution of at least 100ns is required in the pixels.

62. CERN Detector Seminar 62 We have developed within several iterations a monolithic pixel sensor. It is a system on a chip - the readout electronics is placed on the same chip as the sensors. The signals are directly sent to FPGAs via GBit links. We measure 99% efficiency in beam tests Thinned chips successfully tested MuPixel Test of a thinned chip <100um Kapton cable 1.25GBit/s data transmission

63. CERN Detector Seminar 63 We have developed within several iterations a monolithic pixel sensor. It is a system on a chip - the readout electronics is placed on the same chip as the sensors. The signals are directly sent to FPGAs via GBit links. We measure 99% efficiency in beam tests. >99% detector effeiciency

64. CERN Detector Seminar 64 ATLAS

65. CERN Detector Seminar 65 HVCMOS is also investigated for ATLAS upgrade, both for pixel and strip layers. Two concepts 1. The more conservative concept is to keep the existing readout chips, with slight modifications, and to replace the existing planar pixel or strip sensors with so called smart HVCMOS sensors 2. Monolithic sensors

66. CERN Detector Seminar 66 CCPD Pixels

67. CERN Detector Seminar 67 Several smaller pixels connected to one readout cell of FEI4. Increased spatial resolution. Signals can be then capacitively transmitted from the sensor to the readout chip. No need for bump bonding + TOT = sub pixel address Readout pixel Size: 50 µm x 250 µm Size: 33 µm x 125 µm Different pulse shapes

68. CERN Detector Seminar 68 >99% detection efficiency before irradiation Several chips irradiated with neutrons at Jozef Stefan institute in Ljubljana. Detection efficiency with an irradiated chip (fluence 10 15 n eq ) 96% Bias voltage was reduced – 12V Efficiency of more than 99 % has been measured by University of Geneva with unirradiated chips and 96% with the chips irradiated to 10 15 n eq /cm 2 with neutrons

69. CERN Detector Seminar 69 CMOS Strips

70. CERN Detector Seminar 70 In the case of strips, hit data are sent in digital format to the external chip that does the triggering. HVCMOS replacement for the strip sensor is actually a pixel sensor with long pixels. The advantages over the present concept is the z-resolution with one layer, less number of wire bonds between the sensor and the digital readout chip, and a simplified readout chip which is only digital. Pixel contains a charge sensitive amplifier CSA

71. CERN Detector Seminar 71 In the case of strips, hit data are sent in digital format to the external chip that does the triggering. HVCMOS replacement for the strip sensor is actually a pixel sensor with long pixels. The advantages over the present concept is the z-resolution with one layer, less number of wire bonds between the sensor and the digital readout chip, and a simplified readout chip which is only digital. Pixel contains a charge sensitive amplifier CSA HVStripV1, irradiated to 2 x 10 15 n eq /cm 2 - MPW of Sr-90 spectrum vs. sensor bias. HVStripV1, irradiated to 2 x 10 15 n eq /cm 2 and 60 MRad – NMOS characteristics.

72. CERN Detector Seminar 72 Radiation Tolerance

73. CERN Detector Seminar 73 Radiation tolerance Spectrum of beta particle signals when a HVStripV1, irradiated to 2 x 10 15 n eq /cm 2 is exposed to Sr-90 source. Calibration x-ray spectra are also shown. Strontium-90 signal after proton irradiation to 2 x 10 15 n eq /cm 2 ~ 3600e. Signal to noise ratio after proton irradiation ~ 20. Charge vs. fluence

74. CERN Detector Seminar 74 Radiation tolerance Compare measured/calculated After a certain dose, we expect that all substrates behave similarly 200 Ohm cm probably the best chioce

75. CERN Detector Seminar 75 Time Resolution

76. CERN Detector Seminar Time resolution Time resolution in test beam measurements was about 100ns – we need 25ns This time uncertainty is mostly caused by the time walk effect The problem is that the preamplifier is designed to have a peaking time > 100ns. Using of long peaking time allows us to operate the detector in low-power mode – long peaking time reduces noise for an equal bias current (power). However if the signal spread is large (landau distribution, we will have a time walk – time skew. 76 TW Tpeak Th Sig

77. CERN Detector Seminar There are a few way to improve time resolution One is to make the amplifier faster. This is possible, however it increases the noise. If we make amplifier faster we will probably need to increase the signal – which can be done by using high resistive substrate. More elegant way to improve the timing - compensation Bases of the fact that the time walk is proportional to the signal amplitude 77

78. CERN Detector Seminar Idea: time walk compensating comparator. Rise time is longer for signal with high amplitudes. This means a signal with higher amplitude has a faster threshold crossing, but the comparator output is slower. A signal with lower amplitude has a later threshold crossing but the comparator output is faster. As consequence of this the comparator outputs for all amplitudes can cross in one point. By adding another comparator we can make the response time independent of amplitude. 78 Slow down Higher amplitude Lower amplitude 2

79. CERN Detector Seminar Idea: time walk compensating comparator. Rise time is longer for signal with high amplitudes. This means a signal with higher amplitude has a faster threshold crossing, but the comparator output is slower. A signal with lower amplitude has a later threshold crossing but the comparator output is faster. As consequence of this the comparator outputs for all amplitudes can cross in one point. By adding another comparator we can make the response time independent of amplitude. 79 Amplifier response to signals from 1000e to 3800e Comparator response to signals from 1000e to 3800e 100ns 15ns

80. CERN Detector Seminar 80 HVMAPS

81. CERN Detector Seminar 81 Another concept is the fully monolithic one. As in the case of Mu3e sensors, we would have the sensor and the readout part on the same chip. What are the advantages? We expect a better and easier track reconstruction if we used the rectangular pixels or e.g. 50 um x 50um seize

82. CERN Detector Seminar 82 Another concept is the fully monolithic one. As in the case of Mu3e sensors, we would have the sensor and the readout part on the same chip. What are the advantages? We expect a better and easier track reconstruction if we used the rectangular pixels or e.g. 50 um x 50um seize RowAddr + TS One RO cell /pixel Shift register Pixel contains a charge sensitive amplifier and a discriminator with threshold tune DAC CSA Comparator RAM/ROMHit flag Priority scan logic Time stamp Data bus ReadDelayed TS and trigger Triggered hit flag

83. CERN Detector Seminar 83 Thank you