1. Appendix C Basics of Digital Logic Part I

2. Florida A & M University - Department of Computer and Information Sciences Modern Computer Digital electronics operate with only two voltage levels – high and low other levels are temporary and occur while transitioning between these values binary system matches the underlying abstraction inherent in electronics Use signals instead of voltage levels which are complements or inverses of one another logically true : 1 (asserted) logically false : 0 (deasserted)

3. Florida A & M University - Department of Computer and Information Sciences Logic Block Each input maybe 0 or 1 Each output maybe 0 or 1 Input(s) Logic block Output(s)

4. Florida A & M University - Department of Computer and Information Sciences Logic Blocks Combinational without memory output depends on only on the current input completed in one machine cycle Sequential Retains memory of previous state output depends on both the inputs and the logic block state

5. Florida A & M University - Department of Computer and Information Sciences Combinational Logic Block Defined by the values of the outputs for each possible set of input values (truth table) n inputs  2 n combinations of input values

6. Florida A & M University - Department of Computer and Information Sciences Truth Table - example Output y is 1 when inputs w and x have the same value Output z is 1 when both inputs are 0 InputsOutputs wxyz 1110 1000 0100 0011

7. Florida A & M University - Department of Computer and Information Sciences Truth Table Completely describes combinational logic function Grow in size quickly May not be easy to understand

8. Florida A & M University - Department of Computer and Information Sciences Boolean Algebra Another approach to express logic function as logic equations All variables have the values 0 or 1 Three operators OR AND NOT (unary)

9. Florida A & M University - Department of Computer and Information Sciences Boolean Algebra OR operator result is 1 if either of the operands (variables) is 1 also known as logical sum notation: A + B AND operator result is 1 only if both operands (variables) is 1 also known as logical product notation: A  B NOT operator Result is 1 only if operand is 0 Inversion or negation of the value Notation:

10. Florida A & M University - Department of Computer and Information Sciences Boolean Algebra Laws Identity : A + 0 = AA  1 = A Zero and One : A  0 = 0A + 1 = 1 Inverse: Commutative: A  B = B  A A + B = B + A Associative:A + (B + C) = (A + B) + C A  (B  C) = (A  B)  C Distributive: A  (B + C) = (A  B) + (A  C) A + (B  C) = (A + B)  (A + C)

11. Florida A & M University - Department of Computer and Information Sciences Boolean Algebra Laws Idempotent : A + A = AA  A = A DeMorgan’s :

12. Florida A & M University - Department of Computer and Information Sciences Boolean Algebra - example y = w  x + z = InputsOutputs wxyz 1110 1000 0100 0011

13. Florida A & M University - Department of Computer and Information Sciences Logic Gates Used to build logic blocks by implementing basic logic functions AND gate May have multiple inputs Output equal to the AND of all inputs OR gate May have multiple inputs Output equal to the OR of all inputs NOT gate inverter Single input

14. Florida A & M University - Department of Computer and Information Sciences Logic Gates - example y = w  x + z = InputsOutputs wxyz 1110 1000 0100 0011 z x w What is logic gate implementation for y?

15. Florida A & M University - Department of Computer and Information Sciences Logic Gate Implementation Algorithm 1. Determine the truth table for problem statement 2. Consider each output independently a. Consider all nonzero entries for the output b. Write the logic equation c. Simplify the logic equation using the laws of Boolean algebra (if possible) 3.Draw the digital logic gate implementation of the simplified logic equation

16. Florida A & M University - Department of Computer and Information Sciences Logical Function Find a logical expression for the logical function with three inputs A, B, and C and four outputs W, X, Y and Z such that W is true if at least two of the inputs is true, X is true if exactly one of the inputs is true, Y is true if B is false, and Z is true if all three inputs are true. ABCABC WXYZWXYZ Digital Logic Gate Implementation

17. Florida A & M University - Department of Computer and Information Sciences Logical Function – Truth Table InputsOutputs ABCWXYZ 1111001 1101000 1011010 1000110 0111000 0100100 0010110 0000010

18. Florida A & M University - Department of Computer and Information Sciences Logic Function –Boolean Algebra Find a logical expression for the logical function with three inputs A, B, and C and four outputs W, X, Y and Z such that W is true if at least two of the inputs is true, X is true if exactly one of the inputs is true, Y is true if B is false, and Z is true if all three inputs are true.

19. Florida A & M University - Department of Computer and Information Sciences Function – Simplified Boolean Algebra Find a logical expression for the logical function with three inputs A, B, and C and four outputs W, X, Y and Z such that W is true if at least two of the inputs is true, X is true if exactly one of the inputs is true, Y is true if B is false, and Z is true if all three inputs are true.

20. Florida A & M University - Department of Computer and Information Sciences Decoder n input bits 2 n outputs (Out0, Out1, …, Out2 n -1) n-bit input translated into a signal that corresponds to the binary value of the n-bit input (i.e. If n-bit input is i, then Outi will be true and others false)

21. Florida A & M University - Department of Computer and Information Sciences Encoder 2 n inputs n-bit output (Out0, Out1, …, Outn-1) Inverse function of a decoder

22. Florida A & M University - Department of Computer and Information Sciences Multiplexor / Selector n inputs 1 output – one of the inputs Control (selector) lines determine which input becomes the output  log 2 n  = # of required control

23. Florida A & M University - Department of Computer and Information Sciences Multiplexor (2-1) S0S0 ABZ 0 111 101 010 000 1 111 100 011 000

24. Florida A & M University - Department of Computer and Information Sciences Multiplexor (4-1)

25. Florida A & M University - Department of Computer and Information Sciences Don’t Cares Situations where one does not care what the value of some output is Another output is true Subset of input combinations determines the values of the outputs Make it easier to optimize implementation of a logic function due to simpler expression Two types Output : don’t care about its value for some input combination Input : output depends on only some of the inputs Appear as x’s in truth table

26. Florida A & M University - Department of Computer and Information Sciences Don’t Cares – example Find a logical expression for the logical function with three inputs A, B, and C and three outputs W, Y and Z such that: W is true if A or C are true, no matter the value of B, Y is true if A or B is true, no matter the value of C, and Z is true if exactly one of the inputs is true and don’t care about its value when both W and Y are true. InputsOutputs ABCWYZ 111 110 101 100 011 010 001 000

27. Florida A & M University - Department of Computer and Information Sciences Don’t Cares – example Find a logical expression for the logical function with three inputs A, B, and C and three outputs W, Y and Z such that: W is true if A or C are true, no matter the value of B, Y is true if A or B is true, no matter the value of C, and Z is true if exactly one of the inputs is true and don’t care about its value when both W and Y are true. InputsOutputs ABCWYZ 1111 1101 1011 1001 0111 0100 0011 0000

28. Florida A & M University - Department of Computer and Information Sciences Don’t Cares – example Find a logical expression for the logical function with three inputs A, B, and C and three outputs W, Y and Z such that: W is true if A or C are true, no matter the value of B, Y is true if A or B is true, no matter the value of C, and Z is true if exactly one of the inputs is true and don’t care about its value when both W and Y are true. InputsOutputs ABCWYZ 11111 11011 10111 10011 01111 01001 00110 00000

29. Florida A & M University - Department of Computer and Information Sciences Don’t Cares – example Find a logical expression for the logical function with three inputs A, B, and C and three outputs W, Y and Z such that: W is true if A or C are true, no matter the value of B, Y is true if A or B is true, no matter the value of C, and Z is true if exactly one of the inputs is true and don’t care about its value when both W and Y are true. InputsOutputs ABCWYZ 111110 110110 101110 100111 011110 010011 001101 000000

30. Florida A & M University - Department of Computer and Information Sciences Don’t Cares – example Find a logical expression for the logical function with three inputs A, B, and C and three outputs W, Y and Z such that: W is true if A or C are true, no matter the value of B, Y is true if A or B is true, no matter the value of C, and Z is true if exactly one of the inputs is true and don’t care about its value when both W and Y are true. InputsOutputs ABCWYZ 11111x 11011x 10111x 10011x 01111x 010011 001101 000000

31. Florida A & M University - Department of Computer and Information Sciences Don’t Cares – example Find a logical expression for the logical function with three inputs A, B, and C and three outputs W, Y and Z such that: W is true if A or C are true, no matter the value of B, Y is true if A or B is true, no matter the value of C, and Z is true if exactly one of the inputs is true and don’t care about its value when both W and Y are true. InputsOutputs ABCWYZ 11111x 11011x 10111x 10011x 01111x 010011 001101 000000

32. Florida A & M University - Department of Computer and Information Sciences Don’t Cares – example Find a logical expression for the logical function with three inputs A, B, and C and three outputs W, Y and Z such that: W is true if A or C are true, no matter the value of B, Y is true if A or B is true, no matter the value of C, and Z is true if exactly one of the inputs is true and don’t care about its value when both W and Y are true. InputsOutputs ABCWYZ 1xx11x 1xx11x 1xx11x 1xx11x 01111x 010011 001101 000000

33. Florida A & M University - Department of Computer and Information Sciences Don’t Cares – example Find a logical expression for the logical function with three inputs A, B, and C and three outputs W, Y and Z such that: W is true if A or C are true, no matter the value of B, Y is true if A or B is true, no matter the value of C, and Z is true if exactly one of the inputs is true and don’t care about its value when both W and Y are true. InputsOutputs ABCWYZ 1xx11x 01111x 010011 001101 000000

34. Florida A & M University - Department of Computer and Information Sciences Array of Logic Elements Combinational operations must be performed on an entire word (32 bits) Represent by showing that a given operation will happen to entire collection of inputs Example: A and B are both 32 bits Output, which is also 32 bits, gets A or B

35. Florida A & M University - Department of Computer and Information Sciences What is the digital logic implementation?

36. Florida A & M University - Department of Computer and Information Sciences What is the digital logic implementation? All multiplexers controlled by the same selector input 0 selects A 1 selects B

37. Florida A & M University - Department of Computer and Information Sciences Arithmetic Logic Unit (ALU) Brawn of the computer Performs arithmetic operations Addition Subtraction Performs logical operations AND OR

38. Florida A & M University - Department of Computer and Information Sciences Arithmetic Logic Unit (ALU) MIPS need 32-bit wide ALU Connect 32 1-bit ALUs

39. Florida A & M University - Department of Computer and Information Sciences ALU Logical Operations Operation value selects logical operation 0 for a AND b 1 for a OR b

40. Florida A & M University - Department of Computer and Information Sciences ALU Addition (Adder) Three inputs two operands carryin : carryout of neighbor adder Two outputs sum carryout

41. Florida A & M University - Department of Computer and Information Sciences Adder Implementation? InputsOutputs abCarryInSumCarryout 00000 00110 01010 01101 10010 10101 11001 11111

42. Florida A & M University - Department of Computer and Information Sciences Adder Implementation

43. Florida A & M University - Department of Computer and Information Sciences AND, OR, Adder implementation 32-bit ALU constructed from 32 1-bit ALUs

44. Florida A & M University - Department of Computer and Information Sciences AND, OR, Adder implementation 32-bit ALU constructed from 32 1-bit ALUs

45. Florida A & M University - Department of Computer and Information Sciences Adder Modification for Subtraction Add a 2:1 multiplexor that chooses between b and CarryIn of ALU0 set to 1 for subtraction Remember two’s complement

46. Florida A & M University - Department of Computer and Information Sciences NOR functionality Recall DeMorgan’s

47. Florida A & M University - Department of Computer and Information Sciences slt Functionality RECALL: All bits except the least significant bit is 0, with the least significant bit set according to comparison Expand multiplexor to 4:1 with new input Less Less = 0 on ALU1 – ALU31 (a - b) < 0  a < b ALU31 (most significant bit ALU) has extra output line Set adder output (also used for overflow detection) used only for slt input LESS on ALU0 (least significant bit ALU)

48. Florida A & M University - Department of Computer and Information Sciences ALU Building Blocks ALU0 – ALU30 ALU31

49. Florida A & M University - Department of Computer and Information Sciences ALU

50. Florida A & M University - Department of Computer and Information Sciences Branch Instructions Branch if either two registers are equal or if they are unequal Equality Test: subtract b from a and then test to see if result is 0 REMEMBER: a – b = 0  a = b Implement:

51. Florida A & M University - Department of Computer and Information Sciences MIPS ALU Combine CarryIn and Binvert into one single control line Bnegate both set to 1 for subtraction both set to 0 for addition and logical operations 4 bit control lines Ainvert (1 bit) Bnegate (1 bit) Operation (selector) for multiplexor (2 bits)

52. Florida A & M University - Department of Computer and Information Sciences MIPS ALU

53. Florida A & M University - Department of Computer and Information Sciences MIPS ALU Control Lines Function AinvertBnegateOperation 0000AND 0001OR 0010add 0110subtract 0111slt 1100NOR