1. 1 IKI20210 Pengantar Organisasi Komputer Kuliah No. 23: Aritmatika 18 Desember 2002 Bobby Nazief (nazief@cs.ui.ac.id) Johny Moningka (moningka@cs.ui.ac.id) bahan kuliah: http://www.cs.ui.ac.id/~iki20210/ Sumber: 1. Hamacher. Computer Organization, ed-4. 2. Materi kuliah CS61C/2000 & CS152/1997, UCB.

2. 2 Number Representation

3. 3 Decimal vs. Hexadecimal vs.Binary Unsigned Numbers DecHexBinary 0000000 0110001 0220010 0330011 0440100 0550101 0660110 0770111 0881000 0991001 10A1010 11B1011 12C1100 13D1101 14E1110 15F1111 °Decimal: great for humans, especially when doing arithmetic °Hex: if human looking at long strings of binary numbers, its much easier to convert to hex and look 4 bits/symbol Terrible for arithmetic; just say no °Binary: what computers use; you learn how computers do +,-,*,/ To a computer, numbers always binary

4. 4 How to Represent Negative Numbers? °So far, unsigned numbers °Obvious solution: define leftmost bit to be sign! 0 => +, 1 => - Rest of bits can be numerical value of number °Representation called sign and magnitude

5. 5 Shortcomings of sign and magnitude? °Arithmetic circuit more complicated Special steps depending whether signs are the same or not °Also, Two zeros 0x00000000 = +0 ten 0x80000000 = -0 ten What would it mean for programming? °Sign and magnitude abandoned

6. 6 Another try: complement the bits °Example: 7 10 = 00111 2 -7 10 = 11000 2 °Called one’s Complement °Note: postive numbers have leading 0s, negative numbers have leadings 1s. 000000000101111... 11111 1111010000... °What is -00000 ? °How many positive numbers in N bits? °How many negative ones?

7. 7 Shortcomings of ones complement? °Arithmetic not too hard °Still two zeros 0x00000000 = +0 ten 0xFFFFFFFF = -0 ten What would it mean for programming? °One’s complement eventually abandoned because another solution was better

8. 8 Search for Negative Number Representation °Obvious solution didn’t work, find another °What is result for unsigned numbers if tried to subtract large number from a small one? Would try to borrow from string of leading 0s, so result would have a string of leading 1s With no obvious better alternative, pick representation that made the hardware simple: leading 0s  positive, leading 1s  negative 000000...xxx is >=0, 111111...xxx is < 0 °This representation called two’s complement

9. 9 Two’s Complement Number line °2 N-1 non-negatives °2 N-1 negatives °one zero °how many positives? °comparison? °overflow? 00000 00001 00010 11111 11110 10000 01111 10001 0 1 2 -2 -15 -16 15............

10. 10 Two’s Complement Numbers 0000... 0000 0000 0000 0000 two = 0 ten 0000... 0000 0000 0000 0001 two = 1 ten 0000... 0000 0000 0000 0010 two = 2 ten... 0111... 1111 1111 1111 1101 two = 2,147,483,645 ten 0111... 1111 1111 1111 1110 two = 2,147,483,646 ten 0111... 1111 1111 1111 1111 two = 2,147,483,647 ten 1000... 0000 0000 0000 0000 two = –2,147,483,648 ten 1000... 0000 0000 0000 0001 two = –2,147,483,647 ten 1000... 0000 0000 0000 0010 two = –2,147,483,646 ten... 1111... 1111 1111 1111 1101 two =–3 ten 1111... 1111 1111 1111 1110 two =–2 ten 1111... 1111 1111 1111 1111 two =–1 ten °One zero, 1st bit => >=0 or <0, called sign bit but one negative with no positive –2,147,483,648 ten

11. 11 Two’s Complement Formula °Can represent positive and negative numbers in terms of the bit value times a power of 2: d 31 x -2 31 + d 30 x 2 30 +... + d 2 x 2 2 + d 1 x 2 1 + d 0 x 2 0 °Example 1111 1111 1111 1111 1111 1111 1111 1100 two = 1x-2 31 +1x2 30 +1x2 29 +... +1x2 2 +0x2 1 +0x2 0 = -2 31 + 2 30 + 2 29 +... + 2 2 + 0 + 0 = -2,147,483,648 ten + 2,147,483,644 ten = -4 ten °Note: need to specify width: we use 32 bits

12. 12 Two’s complement shortcut: Negation °Invert every 0 to 1 and every 1 to 0, then add 1 to the result Sum of number and its one’s complement must be 111...111 two 111...111 two = -1 ten Let x’ mean the inverted representation of x Then x + x’ = -1  x + x’ + 1 = 0  x’ + 1 = -x °Example: -4 to +4 to -4 x : 1111 1111 1111 1111 1111 1111 1111 1100 two x’: 0000 0000 0000 0000 0000 0000 0000 0011 two +1: 0000 0000 0000 0000 0000 0000 0000 0100 two ()’: 1111 1111 1111 1111 1111 1111 1111 1011 two +1: 1111 1111 1111 1111 1111 1111 1111 1100 two

13. 13 Two’s comp. shortcut: Sign extension °Convert 2’s complement number using n bits to more than n bits °Simply replicate the most significant bit (sign bit) of smaller to fill new bits 2’s comp. positive number has infinite 0s 2’s comp. negative number has infinite 1s Bit representation hides leading bits; sign extension restores some of them 16-bit -4 ten to 32-bit: 1111 1111 1111 1100 two 1111 1111 1111 1111 1111 1111 1111 1100 two

14. 14 Addition of Positive Numbers

15. 15 One-Bit Full Adder (1/3) °Example Binary Addition: Carries °Thus for any bit of addition: The inputs are a i, b i, CarryIn i The outputs are Sum i, CarryOut i °Note: CarryIn i+1 = CarryOut i a: 0 0 1 1 b: 0 1 0 1 Sum:1 0 0 0

16. 16 One-Bit Full Adder (2/3) Definition Sum = ABC in + ABC in + ABC in + ABC in CarryOut = AB + AC in + BC in ¯ ¯ ¯ ¯ ¯ ¯

17. 17 One-Bit Full Adder (3/3) °To create one-bit full adder: implement gates for Sum implement gates for CarryOut connect all inputs with same name Sum A B CarryIn CarryOut +

18. 18 Ripple-Carry Adders: adding n-bits numbers °Critical Path of n-bit Rippled-carry adder is n*CP CP = 2 gate-delays (C out = AB + AC in + BC in ) A0 B0 1-bit FA Sum0 CarryIn0 CarryOut0 A1 B1 1-bit FA Sum1 CarryIn1 CarryOut1 A2 B2 1-bit FA Sum2 CarryIn2 CarryOut2 A3 B3 1-bit FA Sum3 CarryIn3 CarryOut3

19. 19 Overflow °Binary bit patterns above are simply representatives of numbers °Numbers really have an infinite number of digits with almost all being zero except for a few of the rightmost digits Just don’t normally show leading zeros °If result of add (or -,*/) cannot be represented by these rightmost HW bits, overflow is said to have occurred When CarryOut is generated from MSB 00000 00001 00010 11111 11110

20. 20 Fast Adders

21. 21 Carry Look Ahead: reducing Carry Propagation delay A B S G P A B S G P A B S G P C1 = G0 + C0  P0 = A0  B0 + C0  (A0+B0) C2 = G1 + G0  P1 + C0  P0  P1 C3 = G2 + G1  P2 + G0  P1  P2 + C0  P0  P1  P2 G = G3 + P3·G2 + P3·P2·G1 + P3·P2·P1·G0 C4 =... P = P3·P2·P1·P0 ABC-out 000“kill” 01C-in“propagate” 10C-in“propagate” 111“generate” A0 B0B0 S0S0 G P P = A + B G = A  B Cin

22. 22 Carry Look Ahead: Delays °Expression for any carry: C i+1 = G i + P i G i-1 + … + P i P i-1 … P 0 C 0 °All carries can be obtained in 3 gate-delays: 1 needed to developed all P i and G i 2 needed in the AND-OR circuit °All sums can be obtained in 6 gate-delays: 3 needed to obtain carries 1 needed to invert carry 2 needed in the AND-OR circuit of Sum’s circuit °Independent of the number of bits (n) °4-bit Adder: CLA: 6 gate-delays RC: (3*2 + 3) gate-delays °16-bit Adder: CLA: 6 gate-delays RC: (15*2 + 3) gate-delays Sum = ABC in + ABC in + ABC in + ABC in ¯ ¯ ¯ ¯ ¯ ¯

23. 23 Cascaded CLA: overcoming Fan-in constraint CLACLA 4-bit Adder 4-bit Adder 4-bit Adder C1 = G0 + C0  P0 C2 = G1 + G0  P1 + C0  P0  P1 C3 = G2 + G1  P2 + G0  P1  P2 + C0  P0  P1  P2 G P G0 P0 C4 =... C0 Delay = 3 + 2 + 3 = 8 Delay RC = 15*2 + 3 = 33

24. 24 Signed Addition & Subtraction

25. 25 Addition & Subtraction Operations °Addition: Just add the two numbers Ignore the Carry-out from MSB Result will be correct, provided there’s no overflow 0 1 0 1(+5) +0 0 1 0(+2) 0 1 1 1(+7) 0 1 0 1(+5) +1 0 1 0(-6) 1 1 1 1(-1) 1 0 1 1(-5) +1 1 1 0(-2) 11 0 0 1(-7) 0 1 1 1(+7) +1 1 0 1(-3) 10 1 0 0(+4) 0 0 1 0(+2) 0 0 1 0  0 1 0 0(+4)+1 1 0 0(-4) 1 1 1 0 (-2) 1 1 1 0(-2) 1 1 1 0  1 0 1 1(-5)+0 1 0 1(+5) 10 0 1 1 (+3) °Subtraction: Form 2’s complement of the subtrahend Add the two numbers as in Addition

26. 26 Overflow °Examples: 7 + 3 = 10 but... ° - 4  5 = - 9 but... 2’s ComplementBinaryDecimal 00000 10001 20010 30011 0000 1111 1110 1101 Decimal 0 -2 -3 40100 50101 60110 70111 1100 1011 1010 1001 -4 -5 -6 -7 1000-8 0111 0011+ 1010 1 1100 1011+ 0111 110 7 3 1 – 6 – 4 – 5 7

27. 27 Overflow Detection °Overflow: the result is too large (or too small) to represent properly Example: - 8 < = 4-bit binary number <= 7 °When adding operands with different signs, overflow cannot occur! °Overflow occurs when adding: 2 positive numbers and the sum is negative 2 negative numbers and the sum is positive °On your own: Prove you can detect overflow by: Carry into MSB ° Carry out of MSB 0111 0011+ 1010 1 1100 1011+ 0111 110 7 3 1 – 6 –4 – 5 7 0

28. 28 Overflow Detection Logic °Carry into MSB ° Carry out of MSB For a N-bit Adder: Overflow = CarryIn[N - 1] XOR CarryOut[N - 1] A0 B0 1-bit FA Result0 CarryIn0 CarryOut0 A1 B1 1-bit FA Result1 CarryIn1 CarryOut1 A2 B2 1-bit FA Result2 CarryIn2 A3 B3 1-bit FA Result3 CarryIn3 CarryOut3 Overflow XYX XOR Y 000 011 101 110