1. VLSI Design System-on-Chip Design
Overview of System on a Chip

2. System on Chip Design

3. System on Chip Design
A complete System on a Chip (SoC) design flow beginning with a design specification and ending with a working SoC. Creation of RTL level modules designed for reuse, integration of Intellectual Property (IP) for both RTL level and physical level IP, IC verification, and the creation of self-checking test benches for SoC designs.

4. System on Chip Design
System-on-a-chip (SoC) is a major revolution taking place in the design of integrated circuits due to the unprecedented levels of integration possible. As a result, new methodologies and tools are demanded to address design, verification and test problems presented by SoCs in this rapidly evolving area.

5. System on Chip Design
The key concept in SoC/IP design is that a chip can be constructed rapidly using third-party and internal IP, where IP refers to a pre-designed behavioral or physical descriptions of a standard component.

6. System on Chip Design
According to the International Technology Roadmap for Semiconductors, "Innovation in the techniques used in circuit and system design will be essential to maintain the historical trends in performance improvement."

7. SOC example and VLSI system
For DSM, Interconnects between chips and within chips
dominate the performance of your system !!

8. SOC example
General purpose processor and DSP processor are hard cores (Hard IP)
A pre-designed layout
Programmed, Interface to standard buses
Bus interface unit (Soft IP)
A synthesizable module in Verilog, VHDL, C
Internal buses, External buses (PCI, ISA, etc)
Glue Logic

9. SOC Example Analog: A/D and RF circuitry
MEMS: Micro-Electrical Mechanical Systems
Sensors

10. An Example: System on A Chip Architecture from Palmchip corporation
A BUS ARCHITECTURE FOR SYSTEM-ON-CHIP DESIGNS

11. from Atmel corporation

12. SOC Applications

13. Our Course: System on Chip Design and Architecture
VLSI Integrated Circuit Design: A Design Perspective, emphasis on system performance. Materials mainly from the textbook, some from other books or papers
System Introduction
Multimedia Application, Wireless Application
Telecommunications, Computer Arithmetic, and others

14. Why VLSI? Integration improves the design:
lower parasitics = higher speed;
lower power;
physically smaller = higher speed.
Integration reduces manufacturing cost (almost) no manual assembly.

15. VLSI and you Microprocessors: DRAM/SRAM/Flash Memory/EEPROM.
desktop personal computers;
notebook computers
microcontrollers.
pocket PCs/games
DRAM/SRAM/Flash Memory/EEPROM.
Special-purpose processors.

16. Moore’s Law Gordon Moore: co-founder of Intel.
Predicted that number of transistors per chip would grow exponentially (double every 18 months).
Exponential improvement in technology is a natural trend: steam engines, dynamos, automobiles.

17. Moore’s Law plot

18. The cost of fabrication
Current cost: $2-3 billion.
Typical fab line occupies about 1 city block, employs a few hundred people.
Most profitable period is first 18 months-2 years.

19. Cost factors in ICs For large-volume ICs:
packaging is largest cost;
testing is second-largest cost.
For low-volume ICs, design costs may swamp all manufacturing costs.

20. The VLSI design process
May be part of larger product design.
Major levels of abstraction:
specification;
architecture;
logic design;
circuit design;
layout.
The VLSI design process = SOC design process

21. Challenges in VLSI design
Multiple levels of abstraction: transistors to CPUs.
Multiple and conflicting constraints: low cost and high performance are often at odds.
Short design time: Late products are often irrelevant.

22. Dealing with complexity
Divide-and-conquer: limit the number of components you deal with at any one time.
Group several components into larger components:
transistors form gates;
gates form functional units;
functional units form processing elements;
etc.

23. Layout and its abstractions
Layout for dynamic latch:

24. Stick diagram

25. Transistor schematic

26. Mixed schematic
inverter

27. Levels of abstraction Specification: function, cost, etc.
Architecture: large blocks.
Logic: gates + registers.
Circuits: transistor sizes for speed, power.
Layout: determines parasitics.

28. Circuit abstraction
Continuous voltages and time:

29. Digital abstraction
Discrete levels, discrete time:

30. Register-transfer abstraction
Abstract components, abstract data types:
0010 +
0001 +
0111
0100

31. Top-down vs. bottom-up design
Top-down design adds functional detail.
Create lower levels of abstraction from upper levels.
Bottom-up design creates abstractions from low-level behavior.
Good design needs both top-down and bottom-up efforts.

32. Design abstractions specification behavior function cost logic circuit
English
Executable
program
Sequential
machines
Logic gates
transistors
rectangles
specification
Throughput,
design time
Function units,
clock cycles
Literals,
logic depth
nanoseconds
microns
behavior
function
cost
register-
transfer
logic
circuit
layout

33. Design validation
Must check at every step that errors haven’t been introduced - the longer an error remains, the more expensive it becomes to remove it.
Forward checking: compare results of less- and more-abstract stages.
Back annotation: copy performance numbers to earlier stages.

34. Manufacturing test
Not the same as design validation: just because the design is right doesn’t mean that every chip coming off the line will be right.
Must quickly check whether manufacturing defects destroy function of chip.
Must also speed-grade.