Presentation is loading. Please wait.

Presentation is loading. Please wait.

Ashenden Designs The IEEE Design Automation Standards Committee Peter J. Ashenden, Ashenden Designs DASC Vice Chair

Published byDarlene Catherine Jackson Modified over 8 years ago

Similar presentations

Presentation on theme: "Ashenden Designs The IEEE Design Automation Standards Committee Peter J. Ashenden, Ashenden Designs DASC Vice Chair"— Presentation transcript:

1 Ashenden Designs The IEEE Design Automation Standards Committee Peter J. Ashenden, Ashenden Designs DASC Vice Chair peter@ashenden.com.au

2 Ashenden Designs 4 September 2001 DASC Overview - Peter Ashenden, Vice Chair2 The IEEE DASC The IEEE venue for Electronic Design Automation Standards within the IEEE Fast track to IEC, ANSI standards Run by a Steering Committee and officers Technical work the purvue of Study Groups and Working Groups http://www.dasc.org

3 Ashenden Designs 4 September 2001 DASC Overview - Peter Ashenden, Vice Chair3 DASC Working Groups P1076 VHDL Analysis and Standards Group –Issues Screening and Analysis Committee –VHDL Programming Language Interface Task Force P1076.1 VHDL Analog and Mixed-Signal Working Group P1076.2 VHDL Math Package Working Group P1076.3 VHDL Synthesis Package Working Group P1076.4 Timing (VITAL) Working Group P1076.6 VHDL Synthesis Interoperability Working Group P1164 VHDL Multivalue Logic Packages Working Group P1577 Object Oriented VHDL Working Group Lib IEEE Study Group VHDL Microwave Study Group

4 Ashenden Designs 4 September 2001 DASC Overview - Peter Ashenden, Vice Chair4 DASC Working Groups P1029 Waveform and Vector Exchange Working Group P1364 Verilog Working Group P 1364.1 Verilog Synthesis Subset Working Group P1481 Circuit Delay and Power Calculation Working Group P1499 Open Modeling Forum Working Group P1497 Standard Delay Format Working Group P1551 VHDL System and Interface based Design Working Group P1596 Advanced Library Format (ALF) Working Group OpenAccess Study Group

5 Ashenden Designs 4 September 2001 DASC Overview - Peter Ashenden, Vice Chair5 For Further Information... Working groups are open and depend on volunteer participation Meetings on Friday: –VHDL-AMS (9:00 - 12:00, Room 1) –VHDL Lib IEEE (9:00 - 10:00, Room 2) –VHDL Std-Logic (10:00 - 11:00, Room 2) –DASC Plenary (11:30 - 13:00, Room 2) –VHDL RF/Microwave (14:00 - 17:00, Room tba) Most working group business is conducted by email lists and telephone conferences To get in touch with a working group –see web pages on www.dasc.org –ask me or Paul to refer you peter@ashenden.com.au, mench@mench.com

Download ppt "Ashenden Designs The IEEE Design Automation Standards Committee Peter J. Ashenden, Ashenden Designs DASC Vice Chair"

Similar presentations

Room Scribe Orientation ATE Birds of a Feather Sessions October 2010 FOR AUDIO, PLEASE CALL: 1-800-377-8846 Passcode: 65822149#

Room Scribe Orientation ATE Birds of a Feather Sessions October 2010 FOR AUDIO, PLEASE CALL: Passcode: #
Room Facilitator Orientation ATE Birds of a Feather Sessions October 2010 FOR AUDIO, PLEASE CALL: 1-800-377-8846 Passcode: 65822149#

Room Facilitator Orientation ATE Birds of a Feather Sessions October 2010 FOR AUDIO, PLEASE CALL: Passcode: #
Introduction To VHDL for Combinational Logic

Introduction To VHDL for Combinational Logic
INTRO TO VHDL Appendix A: page 779 - page 831 1. VHDL is an IEEE and ANSI standard. VHDL stands for Very High Speed IC hardware description language.

INTRO TO VHDL Appendix A: page page VHDL is an IEEE and ANSI standard. VHDL stands for Very High Speed IC hardware description language.
Introduction to VHDL CLASS MATERIALS EECE 255. Very High Speed Integrated Circuit Hardware Description Language Industry standard language to describe.

Introduction to VHDL CLASS MATERIALS EECE 255. Very High Speed Integrated Circuit Hardware Description Language Industry standard language to describe.
Digital Design with VHDL Presented by: Amir Masoud Gharehbaghi

Digital Design with VHDL Presented by: Amir Masoud Gharehbaghi
IBIS FUTURES COMMITTEE MULTILINGUAL MODEL: DIGITAL PORT ISSUES Ian Dodd 25 th March 2004.

IBIS FUTURES COMMITTEE MULTILINGUAL MODEL: DIGITAL PORT ISSUES Ian Dodd 25 th March 2004.
CSE 670 Embedded System Design Using FPGAs Prof. Richard E. Haskell 115 Dodge Hall.

CSE 670 Embedded System Design Using FPGAs Prof. Richard E. Haskell 115 Dodge Hall.
1 Introducing IBIS Michael Mirmak Chair, IBIS Open Forum IEEE DASC Meeting October 6, 2011.

1 Introducing IBIS Michael Mirmak Chair, IBIS Open Forum IEEE DASC Meeting October 6, 2011.
Combinational Logic Design Sections 3-1, 3-2 Mano/Kime.

Combinational Logic Design Sections 3-1, 3-2 Mano/Kime.
مرتضي صاحب الزماني References  VHDL International and Open Verilog International : VHDL Synthesis:

مرتضي صاحب الزماني References  VHDL International and Open Verilog International : VHDL Synthesis:
1 Japan NC & JEITA/EDA-TC Update IEC/TC93/WG2 on 5-9 September 2005 in Nara, Japan EDA-TSC/STD-TSC in JEITA WG2 in TC93-JP Renesas Yoshio Okamura.

1 Japan NC & JEITA/EDA-TC Update IEC/TC93/WG2 on 5-9 September 2005 in Nara, Japan EDA-TSC/STD-TSC in JEITA WG2 in TC93-JP Renesas Yoshio Okamura.
Submission doc.: IEEE 802.19-14/0089r1 January 2015 Steve Shellhammer, QualcommSlide 1 3GPP LAA Liaison Approval Process Date: 2015-01-21 Authors: Notice:

Submission doc.: IEEE /0089r1 January 2015 Steve Shellhammer, QualcommSlide 1 3GPP LAA Liaison Approval Process Date: Authors: Notice:
(1) Introduction © Sudhakar Yalamanchili, Georgia Institute of Technology, 2006.

(1) Introduction © Sudhakar Yalamanchili, Georgia Institute of Technology, 2006.
Annual Membership Meeting 2012 A Community of Libraries since 1985.

Annual Membership Meeting 2012 A Community of Libraries since 1985.
ENG3050 Embedded Reconfigurable Computing Systems General Information Handout Winter 2015, January 5 th.

ENG3050 Embedded Reconfigurable Computing Systems General Information Handout Winter 2015, January 5 th.
Friends of Kansas Libraries -FoKL-. History  Formed in 1982  Budget comes mostly from dues  Representatives from 7 regional systems  Members at large.

Friends of Kansas Libraries -FoKL-. History  Formed in 1982  Budget comes mostly from dues  Representatives from 7 regional systems  Members at large.
Ashenden Designs IEEE DASC Steering Committee 2 December 2003 San Jose, CA, USA Peter Ashenden DASC Interim Chair.

Ashenden Designs IEEE DASC Steering Committee 2 December 2003 San Jose, CA, USA Peter Ashenden DASC Interim Chair.
1 1 JEITA STD-TSC updates JEITA EDA standardization subcommittee, Vice chair IEC TC93 WG2, Co-convener NEC System Technologies Satoshi Kojima IEEE-DASC.

1 1 JEITA STD-TSC updates JEITA EDA standardization subcommittee, Vice chair IEC TC93 WG2, Co-convener NEC System Technologies Satoshi Kojima IEEE-DASC.
Ashenden Designs IEEE Design Automation Standards Committee Plenary, 25 September 2003 Frankfurt, Germany Peter Ashenden DASC Interim.

Ashenden Designs IEEE Design Automation Standards Committee Plenary, 25 September 2003 Frankfurt, Germany Peter Ashenden DASC Interim.

Similar presentations

Ads by Google