Presentation is loading. Please wait.

Presentation is loading. Please wait.

Chapter 11 Instruction Sets: Addressing Modes and Formats Gabriel Baron Sydney Chow.

Similar presentations


Presentation on theme: "Chapter 11 Instruction Sets: Addressing Modes and Formats Gabriel Baron Sydney Chow."— Presentation transcript:

1 Chapter 11 Instruction Sets: Addressing Modes and Formats Gabriel Baron Sydney Chow

2  Immediate  Direct  Indirect  Register  Register Indirect  Displacement (Indexed)  Stack

3  Simplest form of addressing  Operand value is present in instruction  Operand = A  e.g. ADD 5  Add 5 to contents of accumulator  5 is operand  Advantages  No memory reference to fetch data  Fast  Disadvantages  Size restriction to the size of address field

4 OperandOpcode Instruction Example: LDAA Opcode = 86 Operand = 05

5  Simple form of addressing  Address field contains address of operand  Effective address (EA) = address field (A)  e.g. ADD A  Add contents of cell A to accumulator  Look in memory at address A for operand  Single memory reference to access data  No additional calculations to work out effective address  Disadvantage  Limited address space

6 Address AOpcode Instruction Memory Operand Example: LDAA Opcode = 96 A= E5 Address A = 00 E5

7  Memory cell pointed to by address field that contains the address of (pointer to) the operand  EA = (A) [parentheses means contents of]  Look in A, find address (A) and look there for operand  e.g. ADD (A)  Add contents of cell pointed to by contents of A to accumulator  Advantages  For word length N, space 2 n now available  Large address space

8  Disadvantages  Requires two memory references to fetch operand  One to get its address  Second to get its value  Slower  Multiple memory accesses to find operand

9 Address AOpcode Instruction Memory Operand Pointer to operand Example: Opcode = XX A = 11C5 11C5 = Operand

10  Address field refers to a register rather than a main memory address  EA = R  Advantages  Very small address field needed  Shorter instructions  Faster instruction fetch  No memory reference required  Very fast execution  Multiple registers helps performance  Requires good assembly programming or compiler writing

11  Disadvantage  Very limited address space

12 Register Address ROpcode Instruction Registers Operand Example: Opcode = XX Register R = Operand

13  EA = (R)  Operand is in memory cell pointed to by contents of register R  Advantages  For word length N, space 2 n now available  Large address space  One fewer memory access than indirect addressing  Disadvantages  Requires two memory references to fetch operand  Multiple memory accesses to find operand  Slower

14 Register Address ROpcode Instruction Memory Operand Pointer to Operand Registers

15  Combines the capabilities of direct addressing and register indirect addressing  EA = A + (R)  Advantages  Flexibility  Disadvantages  Complexity  Requirements  Address field hold two values  A = base value  R = register that holds displacement  or vice versa

16 Register ROpcode Instruction Memory Operand Pointer to Operand Registers Address A +

17  Linear array of locations (last-in-first-out)  Operand is (implicitly) on top of stack  EA = top of stack  Advantages  No memory reference  Disadvantage  Limited applicability  e.g.  ADDPop top two items from stack and add

18

19  The memory is divided into portions that maybe addressed by a single index register without changing a 16-bit segment selector.  A segment is always 64 KB in size using a 16-bit offset.  The X86 Addressing modes are as follows:  Register  Memory  Displacement Only  Indirect  Indexed  Based Indexed

20  Layout of bits in an instruction  Includes opcode  Includes (implicit or explicit) operand(s)  Usually more than one instruction format in an instruction set

21  The most basic design issue to be faced  Affected by and affects:  Memory size  Memory organization  Bus structure  CPU complexity  CPU speed  Trade off between powerful instruction repertoire and saving space

22  Number of addressing modes  Sometimes an addressing mode can be indicated implicitly  i.e. certain opcodes might always call for indexing, so the addressing modes must be explicit and one or more mode bits will be needed  Number of operands  Fewer addresses can make for longer, more awkward programs  Register versus memory  The more that registers can be used or operand references, the fewer bits are needed

23  Number of register sets  These registers can be used to store data and can be used to store addresses for displacement addressing  Address range  For addresses that reference memory, the range of addresses that can be referenced is related to the number of address bits  Address granularity  In a system with 16- or 32- bit words, an address can reference a word or byte at the designer’s choice

24  One of the simplest instruction designs for a general purpose  Each memory reference consist of 7 bits plus two 1-bit modifiers  The memory is divided into fixed-length pages of 2 7 = 128 words  Supports indirect addressing, displacement addressing and indexing

25

26  Designed to be a large-scale time-shared system, with an emphasis on making the system program easy  Some design principals  Orthogonality  Two variables are independent of each other  Completeness  Each arithmetic data type should have a complete and identical set of operations  Direct addressing  Base plus displacement addressing, usually avoided in favor of direct addressing

27

28  Provides a powerful and flexible instruction set within the constraints of a 16-bit microcomputer  Employs a set of eight 16-bit general-purpose registers  Increases hardware cost and programming complexity because of addressing capability  More efficient or compact programs can be deeloped

29

30  Begins with a 1-byte opcode  On hexadecimal codes  Actual opcode being specified in the second byte  Remainder of instructions consist of up to six operand specifiers  Minimum 1-byte format which leftmost 4 bits are the address mode specifier  Provides for a wide variety of operations and addressing modes

31

32  Types of addressing modes are:  Immediate, Direct, Indirect, Register, Register-Indirect, Displacement, Stack …  Some of the Key Design issues for instruction formats are:  Instruction length, allocation of bits, PDP-8, PDP-10, PDP-11, VAX.

33 1. What are four addressing modes? Ans: Immediate, Direct, Indirect, Stack. 2. What is simplest addressing mode? Ans: Immediate Addressing Mode. 3. What is the disadvantage of the direct addressing mode? Ans: Limited Address Space. 4. What is indirect addressing? Ans: The operand is stored in an address, which is stored in an memory cell. 5. Which addressing mode refers to a register instead of a memory address? Ans: Register Addressing Mode

34 6. How does the register indirect addressing mode access the operand? Ans: The operand is store in an address that is pointed to by a memory cell. 7. What two values does the address field hold in the Displacement Addressing mode? Ans: Base value, Register value 8. What order is data sorted in the stack addressing mode? Ans: Last in First Out 9. What are four X86 Addressing Modes? Ans: Register, memory, displacement, indirect.

35 10. Which instruction design is the simplest for general purpose? Ans: PDP-8

36  X86 Addressing Modes  http://www.arl.wustl.edu/~lockwood/class/cs306/books/artofasm/Chapter_4/CH04- 2.html#HEADING2-1 http://www.arl.wustl.edu/~lockwood/class/cs306/books/artofasm/Chapter_4/CH04- 2.html#HEADING2-1  http://www.cs.cmu.edu/~410/doc/segments/segments.html http://www.cs.cmu.edu/~410/doc/segments/segments.html


Download ppt "Chapter 11 Instruction Sets: Addressing Modes and Formats Gabriel Baron Sydney Chow."

Similar presentations


Ads by Google