1. GaAs Photocathode: Transfer Design Collaboration Meeting 6/10/2010

2. Overview Why GaAs? Reflection vs Transmission : Thick Vs Thin Stamp Transfer Smart-Cut Backside-Etch GaAs Wafer Bonding Conclusion Next Steps

3. Why GaAs? 873 nm 413.2 nm 248nm [1],[2]

4. Reflection vs Transmission : Thick vs Thin [3],Graph Courtesy of Zeke Insepov(ANL)

5. Reflection vs Transmission : Thick vs Thin GaAs Electric Field + - Vacuum }

6. GaAs Test Structure 10 nm p+ (~1e18) Variable (0-200 nm) p+ layer 10 nm p++ (~1e19) 1 um AlGaAs buffer (100) GaAs Substrate Growing test structure to determine appropriate thickness Proper Absorption Length (400 nm photon) Reduce Recombination Testing doping using - Zn Strong built in field Band bending at surface for CsO activation Status: SIMS and simulation

7. GaAs Material Quality 300nm terrace ~.3nm RMS roughness Very Good Quality Surface AFM Images Taken by Seon Woo Lee (ANL)

8. Stamp Transfer Procedure [4],[5]

9. Stamp Transfer Analysis Handle Wafer A : Elastomeric Stamp Transferrable Material Etch Holes B: Intermediate Polymer Stamp transfer is fantastic for transferring large areas of arbitrary material to arbitrary substrates NEVERTHELESS: While the material and substrate are arbitrary, the stamp and intermediate layer have to have certain properties Intermediate layer B has to be “stickier” than stamp A Etch holes need to be created so release happens properly Polymer may not stand up to CsO treatment and etch holes may reduce QE and SNR

10. SmartCut Procedure InAs Transferred to SiO2 for Nanowires SmartCut for SOI wafers [6],[7]

11. SmartCut Analysis Graphs Courtesy of Zeke Insepov(ANL) Smartcut is a good technique for transferring heterogeneous material Lattice damage, re-planarization and Gaussian distribution of ion species may make transfer of materials where surface quality is very important Low penetration depth makes backside implantation difficult (Our wafers ~ 325 µm)

12. Backside Etch EtchantEtchesSelective Against Hydrofluoric AcidAlGaAs (Higher Al content etches faster) GaAs Citric AcidGaAsAlGaAs AlGaAs and GaAs are natural etch stops depending on the etchant used The photocathode is relatively undisturbed Unfortunately the wafer is dissolved and not re-useable (2” GaAs Wafer ~ 80$) Process would be long; Lapping or CMP could be used to spread up process

13. Bonding

14. Potential Fabrication 1.Grow thin layer of sacrificial AlGaAs 2.Growth of photocathode, with layers inverted 3.Deposition of intermediate bonding layers (i.e. SiO 2, S ix N x ) 4.Wafer bonded to a glass substrate predeposited bonding layers 5.Bulk of substrate is etched/CMP away 6.Sacrificial layer removed 7.Photocathode ready for activation Glass substrate

15. Conclusion Grown GaAs is of very high quality −Quality wafer manufacturer and MOCVD reactors Stamp transfer may not be suitable to our needs -Future developments may eliminate needs of intermediate layer Smart-cut and/or Backside Etch are being considered as possible routes for photocathode transfer

16. Next Steps Evaluate lattice damage from Smart-Cut and re-planarized Surface Analyze post-etch surface after sacrificial layer removal using AFM Determine maximum transferrable area tolerated by bonding process – Investigate methods to reduce strain in bonding material

17. References [1] W.E. Spicer and A. Herrera-Gomez, “Modern theory and applications of photocathodes,” SPIE MILESTONE SERIES MS, vol. 169, 2001, pp. 104–119. [2] http://www.eecs.umich.edu/~singh/bk7ch03.pdf [3] R.L. Bell, Negative electron affinity devices, Clarendon Press, Oxford, 1973. [4] M.A. Meitl, Z.T. Zhu, V. Kumar, K.J. Lee, X. Feng, Y.Y. Huang, I. Adesida, R.G. Nuzzo, and J.A. Rogers, “Transfer printing by kinetic control of adhesion to an elastomeric stamp,” Nature Materials, vol. 5, 2006, pp. 33–38. [5] J. Yoon, S. Jo, I.S. Chun, I. Jung, H. Kim, M. Meitl, E. Menard, X. Li, J.J. Coleman, U. Paik, and J.A. Rogers, “GaAs photovoltaics and optoelectronics using releasable multilayer epitaxial assemblies,” Nature, vol. 465, May. 2010, pp. 329-333. [6] “Smart Cut - Wikipedia, the free encyclopedia.” [7] S.A. Dayeh, P. Chen, Y. Jing, E.T. Yu, S.S. Lau, and D. Wang, “Integration of vertical InAs nanowire arrays on insulator-on-silicon for electrical isolation,” Applied Physics Letters, vol. 93, 2008, p. 203109.