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In1200/04-PDS 1 TU-Delft Digital Logic. in1200/04-PDS 2 TU-Delft Unit of Information l Computers consist of digital (binary) circuits l Unit of information:

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1 in1200/04-PDS 1 TU-Delft Digital Logic

2 in1200/04-PDS 2 TU-Delft Unit of Information l Computers consist of digital (binary) circuits l Unit of information: bit (Binary digIT), e.g. 0 and 1 l There are two interpretations of 0 and 1: -as data values -as truth values ( true and false )

3 in1200/04-PDS 3 TU-Delft Bit Strings l By grouping bits together we obtain bit strings -e.g which can be given a specific meaning l For instance, we can represent non-negative numbers by bitstrings:

4 in1200/04-PDS 4 TU-Delft Boolean Logic l We want a computer that can calculate, i.e transform strings into other strings: 1 +2 = 3   = l To calculate we need an algebra being able to use only two values l George Boole (1854) showed that logic (or symbolic reasoning) can be reduced to a simple algebraic system

5 in1200/04-PDS 5 TU-Delft Boolean algebra l Rules are the same as school algebra: l There is, however, one exception: x.x = x !

6 in1200/04-PDS 6 TU-Delft Boolean algebra l To see this we have to find out what the operations “+” and “.” mean in logic l First the “.” operation: x.y (or x  y ) l Suppose x means “black things” and y means “cows”. Then x.y means “black cows” l Hence “.” implies the class of objects that has both properties. Also called AND function.

7 in1200/04-PDS 7 TU-Delft Boolean algebra l The “+” operation merges independent objects: x + y (or x  y) l Hence, if x means “woman” and y means “man” l Then x+y means “man and women” l Also called OR function

8 in1200/04-PDS 8 TU-Delft Boolean algebra l Now suppose both objects are identical, for example x means “cows” l Then x.x comprises no additional information l Hence x.x = x 2 = x x +x = x

9 in1200/04-PDS 9 TU-Delft Boolean algebra l Next, we select “0” and “1” as the symbols in the algebra l This choice is not arbitrary, since these are the only number symbols for which holds x 2 = x l What do these symbols mean in logic? -“0” : Nothing -“1” : Universe l So 0.y = 0 and 1.y = y

10 in1200/04-PDS 10 TU-Delft Boolean algebra l Also, if x is a class of objects, then 1-x is the complement of this class l It holds that x(1-x) = x -x 2 = x-x =0 l Hence, a class and its complement have nothing in common xx l We denote 1-x as x instead of the usual x

11 in1200/04-PDS 11 TU-Delft Boolean algebra l A nice property of this system that we write any function f(x) as f(x) = a.x + b(1-x) l We can show this by observing that virtually every mathematical function can be written in polynomial form, i.e f(x) = a 0 + a 1 x + a 2 x 2 +….

12 in1200/04-PDS 12 TU-Delft Boolean algebra l Now x n = x n-1.x = x n-2.x.x = x l Hence, f(x) = a 0 + a 1.x l Let b = a 0 and a = a 0 + a 1 l Then we have f(x) = a.x + b(1-x) l From this it follows that f(0) = b f(1) = a

13 in1200/04-PDS 13 TU-Delft Boolean algebra l So f(x) = f(1).x + f(0).(1-x) l More dimensional functions can be derived in an identical way: f(x,y) = f(1,1).x.y + f(1,0).x(1-y) + f(0,1).y(1-x) + f(0,0).(1-x)(1-y)

14 in1200/04-PDS 14 TU-Delft Binary addition l We apply this on the modulo-2 addition l x  y = x(1-y) + y(1-x) = x.y +x.y

15 in1200/04-PDS 15 TU-Delft Binary multiplication l Same for modulo-2 multiplication l x  y = x.y

16 in1200/04-PDS 16 TU-Delft Functions l Let X denote bitstring, e.g. l Any polynomial function Y=f(X) can be constructed using Boolean logic l Also holds for functions with more arguments l Functions can be put in table form or in formula form

17 in1200/04-PDS 17 TU-Delft Gates l We use basic components to represent primary logic operations (called gates) l Components are made from transistors x y OR x+y x y x.y x x AND INVERT

18 in1200/04-PDS 18 TU-Delft Networks of gates l We can make networks of gates x y x.y+x.y EXOR xyxy

19 in1200/04-PDS 19 TU-Delft Sum of product form f = x.y +x.y +x.y x y f simplify

20 in1200/04-PDS 20 TU-Delft Minimization of expressions l Logic expressions can often be minimized l Saves components l Example: f = x.y.z + x.y.z + x.y.z + x.y.z f = x.y(z +z) + (x +x)y.z f = x.y.1 + 1.y.z f = x.y + y.z

21 in1200/04-PDS 21 TU-Delft Karnaugh maps (1) l Alternative geometrical method x y v w f = v.x + v.w.x + v.w.y + v.x.y

22 in1200/04-PDS 22 TU-Delft Karnaugh maps (2) x y w v y x Different drawing

23 in1200/04-PDS 23 TU-Delft don’t cares l Some outputs are indifferent l Can be used for minimization

24 in1200/04-PDS 24 TU-Delft NAND and NOR gates l NAND and NOR gates are universal l They are easy to realize x.y = x + y x + y = x.y de Morgans Law

25 in1200/04-PDS 25 TU-Delft Delay l Every network of gates has delays input output transition time propagation delay 1 0 1 0 time

26 in1200/04-PDS 26 TU-Delft Packaging Vcc Gnd

27 in1200/04-PDS 27 TU-Delft Making functions nand gates time A,B Y  delay A B Y ADD

28 in1200/04-PDS 28 TU-Delft Functional Units l It would be very uneconomical to construct separate combinatorial circuit for every function needed l Hence, functional units are parameterized l A specific function is activated by a special control string F

29 in1200/04-PDS 29 TU-Delft Arithmetic and Logic Unit A B Y F F F A B Y F

30 in1200/04-PDS 30 TU-Delft Repeated operations l Y : = Y + B i, i=1..n l Repeated addition requires feedback l Cannot be done without intermediate storage of results B Y F F

31 in1200/04-PDS 31 TU-Delft Registers B Y F F = storage element

32 in1200/04-PDS 32 TU-Delft SR flip flop l Storage elements are not transient and are able to hold a logic value for a certain period of time R S Qa Qb

33 in1200/04-PDS 33 TU-Delft Clocks l In many circuits it is very convenient to have the state changed only at regular points in time l This makes design of systems with memory elements easier l Also reasoning about the systems behavior is easier l This is done by a clock signal clock period

34 in1200/04-PDS 34 TU-Delft D flip flop l D flip flop samples at clock is high and stores if clock is low QnQn QnQn C D DQ n+101

35 in1200/04-PDS 35 TU-Delft Edge triggered flip flops l In reality most systems are built such that the state only changes at rising edge of the clock pulse l We also need a control signal to enable a change state change

36 in1200/04-PDS 36 TU-Delft Basic storage element C D Q C I O R/W O C I time enables a state change

37 in1200/04-PDS 37 TU-Delft 4-bit register C R/W C D Q I O C D Q I O C D Q I O C D Q I O

38 in1200/04-PDS 38 TU-Delft Some basic circuits Y MPLEX m AB Y = A if m=1 Y = B if m=0 Y Decoder A Only output y A = 1, rest is 0

39 in1200/04-PDS 39 TU-Delft Decoder Y A Only output y A = 1, rest is 0 a2 a1 0 1 2 3 a1 a2#y 0 00 0 11 1 02 1 13

40 in1200/04-PDS 40 TU-Delft Multiplexer Y MPLEX m AB Y = A if m=1 Y = B if m=0 y m a b

41 in1200/04-PDS 41 TU-Delft Memory REG1 REG2 REG3 REG4 mplex decoder Address Din Dout R/W

42 in1200/04-PDS 42 TU-Delft Counter MPLEX INC 0001 R/W preset output REG

43 in1200/04-PDS 43 TU-Delft Sequential circuits l The counter example shows that systems have state l The state of such systems depend on the current inputs and the sequence of previous inputs l The state of a system is the union of the values of the memory elements of that system

44 in1200/04-PDS 44 TU-Delft State diagrams l We call the change from one state to another a state transition l Can be represented as a state diagram S0 S1 S2 code

45 in1200/04-PDS 45 TU-Delft Conditional Change S0 S1 S2 x=0 x=1

46 in1200/04-PDS 46 TU-Delft Coding of State

47 in1200/04-PDS 47 TU-Delft Put in Karnaugh map 00d1 10d1 x y z 10d0 00d0 x y z Y Z Y = x.y + z Z = x.y.z = (x+z).y

48 in1200/04-PDS 48 TU-Delft Scheme DQ DQ x Y Z z y x.y x.y+z x+z (x+z).y

49 in1200/04-PDS 49 TU-Delft General scheme Combinatorial Logic Delay elements Inputs Outputs

50 in1200/04-PDS 50 TU-Delft Procedure FST 1. Make State Diagram 2. Make State Table 3. Give States binary code 4. Put state update functions in Karnaugh Map 5. Make combinatorial circuit to realize functions


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