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M. Mateen Yaqoob The University of Lahore Spring 2014.

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Presentation on theme: "M. Mateen Yaqoob The University of Lahore Spring 2014."— Presentation transcript:

1 M. Mateen Yaqoob The University of Lahore Spring 2014

2 EXAMPLE: Show how can the following operation be performed using: a- three address instruction b- two address instruction c- one address instruction d- zero address instruction X = (A + B) * (C + D)

3  ADD R1, A, B  R1  M[A] + M[B]  ADD R2, C, D  R2  M[C] + M[D]  MUL X, R1, R2  M[X]  R1 * R2

4  MOV R1, A  R1  M[A]  ADD R1, B  R1  R1 + M[B]  MOV R2, C  R2  M[C]  ADD R2, D  R2  R2 + M[D]  MOV X, R2  M[X]  R2  MUL X, R1  M[X]  R1 * M[X]

5  LOAD A  AC  M[A]  ADD B  AC  AC + M[B]  STORE T  M[T ]  AC  LOAD C  AC  M[C]  ADD D  AC  AC + M[D]  MUL T  AC  AC * M[T ]  STORE X  M[X]  AC Store

6  Push value  Else If operator is encountered: Pop, pop, operation, push  Pop operand pop another operand then perform an operation and push the result back into the stack.  PUSH A TOS  A Push  PUSH B TOS  B  ADD TOS  (A+B)  PUSH C TOS  C  PUSH D TOS  D  ADDTOS  (C+D)  MULTOS  (C+D)*(A+B)  POP X M[X]  TOS  (*TOS stands for top of stack). Pop, pop, operation, push

7  The family concept  IBM System/360 1964  DEC PDP-8  Separates architecture from implementation  Microporgrammed control unit  Idea by Wilkes 1951  Produced by IBM S/360 1964  Cache memory  IBM S/360 model 85 1969

8  Solid State RAM  (See memory notes)  Microprocessors  Intel 4004 1971  Pipelining  Introduces parallelism into fetch execute cycle  Multiple processors

9  Reduced Instruction Set Computer  Key features  Large number of general purpose registers  or use of compiler technology to optimize register use  Limited and simple instruction set  Emphasis on optimising the instruction pipeline

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11  Software costs far exceed hardware costs  Increasingly complex high level languages  Semantic gap  Leads to:  Large instruction sets  More addressing modes  Hardware implementations of HLL statements  e.g. CASE (switch) on VAX

12  Ease compiler writing  Improve execution efficiency  Complex operations in microcode  Support more complex HLLs

13  Operations performed  Operands used  Execution sequencing  Studies have been done based on programs written in HLLs  Dynamic studies are measured during the execution of the program

14  Assignments  Movement of data  Conditional statements (IF, LOOP)  Sequence control  Procedure call-return is very time consuming  Some HLL instruction lead to many machine code operations

15  Mainly local scalar variables  Optimisation should concentrate on accessing local variables

16  Very time consuming  Depends on number of parameters passed  Depends on level of nesting  Most programs do not do a lot of calls followed by lots of returns  Most variables are local  (c.f. locality of reference)

17  Best support is given by optimising most used and most time consuming features  Large number of registers  Operand referencing  Careful design of pipelines  Branch prediction etc.  Simplified (reduced) instruction set


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