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1 Detectors RIT Course Number 1051-465 Lecture N: Lecture Title.

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Presentation on theme: "1 Detectors RIT Course Number 1051-465 Lecture N: Lecture Title."— Presentation transcript:

1 1 Detectors RIT Course Number 1051-465 Lecture N: Lecture Title

2 2 Section Title Slide

3 3 pn Junction Review PN junctions are fabricated from a monocrystalline piece of semiconductor with both a P-type and N-type region in proximity at a junction. The transfer of electrons from the N side of the junction to holes annihilated on the P side of the junction produces a barrier voltage. This is 0.6 to 0.7 V in silicon, and varies with other semiconductors. A forward biased PN junction conducts a current once the barrier voltage is overcome. The external applied potential forces majority carriers toward the junction where recombinetion takes place, allowing current flow. A reverse biased PN junction conducts almost no current. The applied reverse bias attracts majority carriers away from the junction. This increases the thickness of the nonconducting depletion region. Reverse biased PN junctions show a temperature dependent reverse leakage current. This is less than a µA in small silicon diodes.

4 4 N-type

5 5 Band Diagram: Acceptor Dopant in Semiconductor For Si, add a group III element to “accept” an electron and make p-type Si (more positive “holes”). “Missing” electron results in an extra “hole”, with an acceptor energy level E A just above the valence band E V. –Holes easily formed in valence band, greatly increasing the electrical conductivity. Fermi level E F moves down towards E V. EAEA ECEC EVEV EFEF p-type Si

6 6 P-type

7 7 Conduction in p/n-type Semiconductors

8 8

9 9 PN Junction: Band Diagram Due to diffusion, electrons move from n to p-side and holes from p to n-side. Causes depletion zone at junction where immobile charged ion cores remain. Results in a built-in electric field (10 3 to 10 5 V/cm), which opposes further diffusion. Note: E F levels are aligned across pn junction under equilibrium. Depletion Zone electrons pn regions in equilibrium holes EVEV EFEF ECEC EFEF EVEV EFEF ECEC + + + + + + + + + + + + – – – – – – – – – – – – p-type n-type

10 10 PN Junction: Band Diagram under Bias Forward Bias: negative voltage on n-side promotes diffusion of electrons by decreasing built-in junction potential  higher current. Reverse Bias: positive voltage on n-side inhibits diffusion of electrons by increasing built-in junction potential  lower current. Minority Carriers Forward BiasReverse BiasEquilibrium e– Majority Carriers p-typen-type p-typen-type p-typen-type –V +V

11 11 Forward & Reverse Biased

12 12 PN Junction: IV Characteristics Current-Voltage Relationship Forward Bias: current exponentially increases. Reverse Bias: low leakage current equal to ~I o. Ability of pn junction to pass current in only one direction is known as “rectifying” behavior. Reverse Bias Forward Bias

13 13 Current-Voltage Relationship Forward Bias: current exponentially increases. Reverse Bias: low leakage current equal to ~I o. Ability of pn junction to pass current in only one direction is known as “rectifying” behavior. PN Junction: IV Characteristics

14 14 Doped Silicon

15 15 Suitable doped silicon bandgaps for detectors

16 16 Generation & Recombination In intrinsic semiconductor –n = p = n i n i is strongly temperature dependent This is because at a give temperature –Recombination of electrons (r i )= thermal generation rate (g i ) r i = Bnp = g i (= Bn i **2 for intrinsic semiconductor)

17 17 Photon induced excess carriers

18 18 Photon induced excess carriers

19 19 Photon induced excess carriers

20 20 xx

21 21 xx

22 22 xx

23 23 xx

24 24 Rate of change of carrier concentration

25 25

26 26

27 27 Diffusion

28 28

29 29

30 30

31 31

32 32 PN Junction

33 33 PN Junction

34 34

35 35

36 36

37 37 Put it all together …

38 38 Steps PN junction is reversed biased. Shutter opened and photon enters semiconductor Interacts with lattice generates minority carrier Minority carrier diffuses till it reaches vicinity of junction Junction field drives minority carrier across junction and discharges junction capacitance At the end of some integration time measure voltage (V2)across junction. Reset junction voltage to initial reverse bias value and measure its value (V1). Difference in voltage is proportional to signal. ΔQ = C1(V1-Vbi) * (V1-vbi) – C2(V2-Vbi) * (V2-Vbi)

39 39 Designing a junction

40 40 Dark Signal

41 41 Slide Title xxxxxx

42 42 Section Title Slide

43 43 Slide Title xxxxxx

44 44 Section Title Slide

45 45 Slide Title xxxxxx


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