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Visual Specification of a DSL Processor Debugger Tamás Mészáros and Tihamér Levendovszky Budapest University of Technology and Economics.

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Presentation on theme: "Visual Specification of a DSL Processor Debugger Tamás Mészáros and Tihamér Levendovszky Budapest University of Technology and Economics."— Presentation transcript:

1 Visual Specification of a DSL Processor Debugger Tamás Mészáros and Tihamér Levendovszky Budapest University of Technology and Economics

2 Overview  Defining the Dynamic Behavior of Graphical DSLs Animation Framework  A Case Study Graph transformation debugger

3 Building DSLs  Abstract syntax (rules of the language) Metamodeling  Concrete syntax (visual appearance) Annotations to metamodel Textual languages DSL + processing  Dynamic behavior?

4 Defining Dynamic Behavior  Annotation to metamodel  Textual programming language constructs  DSL Visual Modeling and Transformation System (VMTS) Animation Framework

5 THE VMTS ANIMATION FRAMEWORK Part I.

6 Animation Framework Overview

7 VMTS Animation Framework  Separating animation from model simulation The domain knowledge is considered black-box Animation logic is described with an event-driven state machine Integration with an event-driven approach  The integration is supported with visual modeling techniques  Processing animation models Generating skeleton for event handlers Generating executable application from animator models

8 VMTS Animation Framework  Event handler model Event-driven interface for external components Elements  Events  Entites ( event parameters)  Ports

9 VMTS Animation Framework  Animator Event-driven state machine Port-based interface States Transitions  Guard expression  Action expression

10 VMTS Animation Framework  High Level Animation Model Event handler Animator Port Event route

11 THE VMTS TRANSFORMATION DEBUGGER Part II.

12 Graph rewriting  Rewriting rule  Host graph

13 VMTS model transformation engine  Graph rewriting-based approach Rewriting rules  Searching for graph patterns (LHS graph)  Replacing matches with a substitue pattern (RHS) Control sequence  Visual Control Flow Language Rule application Conditional branching Exhaustive rule application Parameter passing between rules

14 Model transformation debugger  Goals Visualization of input and output models Animating the Control Flow model Visualizing the executed rewriting rule Continuous and step-by-step execution, breakpoints, jumping in the Control Flow Online editing of input and output models

15 Model transformation debugger  Event handler model Wrapping the transformation engine

16 Model transformation debugger  High-level animation model Event handlers  UI, GT, Timer Animators  GT, Highlight, hotkey HighlightGT

17 Model transformation debugger  State machine model (SIM_GT) 1) Init 2) Idle 3) Process start 4) Process edge  Breakpoint 5) Process rule node 6) Decision node 7) End node

18 Debugger – in action

19 Summary

20 Thank you for your attention! http://vmts.aut.bme.hu


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