1. Paper Reading - A New Approach to Pipeline FFT Processor Presenter:Chia-Hsin Chen, Yen-Chi Lee Mentor:Chenjo Instructor:Andy Wu

2. 2006.10.25 Owen, Lee2 Outline What’s FFT FFT on Hardware Comparison C/C++ Sim Further Study Reference

3. 2006.10.25 Owen, Lee3 What’s DFT The Fourier transform of discrete-time signals continuous function Sample X(ω) at equal spaced frequencies discrete function this is called the discrete Fourier transform (DFT) of x(n)

4. 2006.10.25 Owen, Lee4 What’s FFT An efficient algorithm computes DFT Twiddle Factor:

5. 2006.10.25 Owen, Lee5 What’s FFT (cont.) Direct computation N 2 multiplication N(N – 1) addition FFT Symmetry: Periodicity:

6. 2006.10.25 Owen, Lee6 Divide-and-Conquer Simple divide case: N = LM (for N points) n=l+mL, k=Mp+q Apply 2-dimensional index map where

7. 2006.10.25 Owen, Lee7 Two Dimensional Sequence l \ m012…M-1 0x(0)x(1)x(2)…x(M-1) 1x(M)x(M+1)x(M+2)…x(2M-1) 2x(2M)x(2M+1)x(2M+2)…x(3M-1) :::::: L-1x((L-1)M)x((L-1)M+1)……x(LM-1)

8. 2006.10.25 Owen, Lee8 Comparison Computations decrease Total computations Complex multiplications Complex additions Before divisionN2N2 N(N-1) After divisionN(M+L+1)N(M+L-2)

9. 2006.10.25 Owen, Lee9 Radix Let N=r 1 r 2 r 3 …r v For special case N=r v r is called the radix r = 2

10. 2006.10.25 Owen, Lee10 Radix-2 Butterfly DIT DIF

11. 2006.10.25 Owen, Lee11 Review of FFT approach A divide and conquer approach Radix-2 Multi-path Delay Commutator Radix-2 Single-path Delay Feedback Radix-4 Single-path Delay Feedback

12. 2006.10.25 Owen, Lee12 Review (cont.) Radix-4 Multi-path Delay Commutator Radix-4 Single-path Delay Commutator

13. 2006.10.25 Owen, Lee13 Radix-2 2 DIF Algorithm Proposed by S. He and M. Torkelson Applying a 3-dimensional linear index map

14. 2006.10.25 Owen, Lee14 Radix-2 2 DIF Algorithm (cont.)

15. 2006.10.25 Owen, Lee15 Radix-2 2 DIF Algorithm (cont.)

16. 2006.10.25 Owen, Lee16 Butterfly with Decomposed Twiddle Factors

17. 2006.10.25 Owen, Lee17 Relation Between Radix-4 & Radix-2 2 Combined Radix-4 with Radix-2

18. 2006.10.25 Owen, Lee18 R2 2 SDF Pipeline FFT Example: N=256

19. 2006.10.25 Owen, Lee19 Comparison Multiplier#Adder# Memory size Control R2MDC2(log 4 N – 1)4log 4 N3N/2 - 2Simple R2SDF2(log 4 N – 1)4log 4 NN – 1Simple R4SDFlog 4 N – 18log 4 NN – 1Medium R4MDC3(log 4 N – 1)8log 4 N5N/2 – 4Simple R4SDClog 4 N – 13log 4 N2N – 2Complex R2 2 SDFlog 4 N – 14log 4 NN – 1Simple

20. 2006.10.25 Owen, Lee20 C/C++ Simulation Complex class BF2i 、 BF2ii DelayReg ComputeW DFT FFT4->FFT16->FFT64->FFT256->FFTn

21. 2006.10.25 Owen, Lee21 C/C++ Sim (cont.)

22. 2006.10.25 Owen, Lee22 Further Study R2 3 SDF Proposed by S. He and M. Torkelson

23. 2006.10.25 Owen, Lee23 Further Study (cont.) R2 4 SDF Proposed by J. OH and M. LIM

24. 2006.10.25 Owen, Lee24 CORDIC COordinate Rotation DIgital Computer An iterative arithmetic algorithm introduced by Volder in 1956 Can handle many elementary functions, such as trigonometric, exponential, and logarithm with only shift-and-add arithmetic

25. 2006.10.25 Owen, Lee25 References S. He and M. Torkelson. “A new approach to pipeline FFT processor.” IEEE Proceedings of IPPS ’96. S. He and M. Torkelson. “Designing Pipeline FFT Processor for OFDM (de)Modulation.” ISSSE, pp. 257-262, Sept. 1998. J. Y. Oh and M. S. Lim. “New Radix-2 to the 4th Power Pipeline FFT Processor.” IEICE Trans. Electron., Vol.E88-C, No.8 Aug. 2005 E. E. Swartzlander, W. K. W. Young, and S. J. Joseph. “A radix 4 delay commutator for fast Fourier transform processor implementation.” IEEE J. Solid-State Circuits, SC- 19(5):702-709, Oct. 1984. C. D. Thompson. “Fourier transform in VLSI.” IEEE Trans. Comput., C-32(11):1047- 1057, Nov.1983. Y. Jung, Y. Tak, J. Kim, J. Park, D. Kim, and H. Park. “Efficient FFT Algorithm for OFDM Modulation.” Proceedings of IEEE Region 10 International Conference on Electrical and Electronic Technology. Vol.2 pp.676-678, 2001. A. M. Despain. “Very Fast Fourier Transform Algorithms Hardware for Implementation.” IEEE Trans. on Computers, Vol. c-28, No. 5, May 1979 A. –Y. Wu. “CORDIC.” Slides of Advanced VLSI Y. H. Hu. “CORDIC-based VLSI architectures for digital signal processing.” IEEE Signal Processing Magazine. Pp. 16-35. July 1992 J. G. Proakis. D. G. Manolakis. “Digital signal processing” 3rd edition, Prentice Hall

26. 2006.10.25 Owen, Lee26 Thanks for Your Attention Q & A ?