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RF network in SoC1 SoC Test Architecture with RF/Wireless Connectivity 1. D. Zhao, S. Upadhyaya, M. Margala, “A new SoC test architecture with RF/wireless.

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Presentation on theme: "RF network in SoC1 SoC Test Architecture with RF/Wireless Connectivity 1. D. Zhao, S. Upadhyaya, M. Margala, “A new SoC test architecture with RF/wireless."— Presentation transcript:

1 RF network in SoC1 SoC Test Architecture with RF/Wireless Connectivity 1. D. Zhao, S. Upadhyaya, M. Margala, “A new SoC test architecture with RF/wireless connectivity,” in Proceedings of the European Test Symposium (ETS’05), pp. 14-19, 2005.

2 RF network in SoC2 Overview Paper proposes new SoC test network Uses distributed multihop wireless test control network “Radio-on-Chip” technology Initial Research for complete application and implementation in 4-6 years Studies system design issues RF node placement Clustering Routing Discusses system optimization TAM design Test scheduling

3 RF network in SoC3 Motivation Future SoC design involve integration of numerous heterogeneous Intellectual Property cores Future Problems Non-scalable global wire delays Failure to achieve global synchronization Errors from signal integrity issues Bandwidth limitations Difficulties associated with wired interconnects

4 RF network in SoC4 Technology for Possible Solution Radio frequency (RF) interconnect technology for future intra-chip communications Goal: wireless radios replace wires Increase accessibility Improve bandwidth utilization Eliminate delay and cross-talk noise from wired interconnect RF interconnect is very new Usefulness investigated in this paper and future research

5 RF network in SoC5 SoC Test Challenges Accessing deeply embedded cores with high-speed, high-efficiency, and low- cost interconnect structure Partitioning test resources and scheduling IP cores to achieve maximum parallelism Developing a high-efficiency, low-cost control network to execute the test application based on a predetermined schedule

6 RF network in SoC6 Proposed Solution Wireless radios transmit Test data Control signals To access deeply embedded cores In conjunction, a new SoC test strategy needs to be developed Uses short range, low-power, & low cost wireless network To schedule core and chip level tests Used for the entire chip test control communication

7 RF network in SoC7 MTCNet Multihop wireless test control network (MTCNet) Reduce transmission power Avoid chip overheating Efficient control processing Tree Structure Scheduler at root RF nodes at vertices IP cores at leaves For parallel test control Subcontrollers cover subnetworks under supervision of scheduler.

8 RF network in SoC8 System Resource Distribution System resources in an SoC consist of two parts Test Control Distribution RF nodes in the intra-chip wireless test control network Test Resource Distribution Circuit blocks required to perform a test Focuses on optimal routing of TAM from a dedicated test source to core-under-test to dedicated test sink

9 RF network in SoC9 Test Control Distribution Cluster of IP cores share 1 on-chip RF node Maximum coverage of RF nodes determines Number of RF nodes needed in the SoC Wiring between RF nodes and the cores Disk covering algorithm for optimal node placement

10 RF network in SoC10 TAM Routing Case (a): Cores connected on the same TAM belong to different clusters Concurrent testing of A & B Unicast control signal to RF 1 Signal forwarded to A & B along hard-wires

11 RF network in SoC11 TAM Routing Case (b): Cores connected on the same TAM belong to same cluster Concurrent testing of A & B Multicast control signal to RF nodes 1 & 2 Uses two separate wireless routing paths

12 RF network in SoC12 TAM Routing Case (c): Combination of case (a) and (b) (b) has less TAM routing than (a) (b) has more control routing due to multicasting

13 RF network in SoC13 Goal of Optimal TAM Routing Reduce the overall test application time with efficient test scheduling algorithm Connects the IPs in SoC to test sources and sinks Compatible tests routed on parallel TAMs Cores competing for the same test resource connected sequentially on same TAM

14 RF network in SoC14 Simulation Study Experimental results for the proposed algorithm SoC d695 from ITC’02 SOC Test Benchmarks Floorplan of cores on-chip is randomly generated

15 RF network in SoC15 Simulation Study Column Definitions W max : Max TAM width T appl : Overall test application time C TAM : TAM routing cost C control : test control routing cost C all : Overall Testing Cost

16 RF network in SoC16 Conclusions Presented system optimization technique for integration of resource distribution RF links TAM routing to minimize overall testing cost Future Work Address system optimization problem Evaluate impact of wireless test control on system testing solution

17 RF network in SoC17 Simulation Study


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