1. Fast Addressing of Plasma Display Panels Vladimir Nagorny Plasma Dynamics Corp.

2. Addressing Speed Frame (16.7ms) ≥10 Subfields Frame (16.7ms) ≥10 Subfields Reset ~ 300  s ·10  3ms Reset ~ 300  s ·10  3ms Address ~ 1-1.5  s/line (best)  5-7.5ms (500 lines)  10-15ms (1000 lines) Address ~ 1-1.5  s/line (best)  5-7.5ms (500 lines)  10-15ms (1000 lines) Sustain (Variable time) Sustain (Variable time) Unless addressing speed better (<1ms/line) Unless addressing speed better (<1ms/line) Single Scan  Low Resolution, or dim image Single Scan  Low Resolution, or dim image High Resolution  Dual Scan High Resolution  Dual Scan

3. Plasma Dynamics Corp. How to make addressing faster? To answer this question one should first answer other questions: To answer this question one should first answer other questions: Q1: How does address discharge work? Q1: How does address discharge work? Q2: Which factors control/limit its speed? Q2: Which factors control/limit its speed? Q3: Are there any alternative ways to make addressing faster? Q3: Are there any alternative ways to make addressing faster?

4. Plasma Dynamics Corp. Q1: Starting point for addressing Assume that at the end of the reset period both SG and PG discharges are active, and ramp is stable. This can be verified by measuring the Vt-curve (K. Sakita, et al., SID2001; H. Kim, et. al., SID2001; S.T. de Zwart and B. Salters, IDW2001). Assume that at the end of the reset period both SG and PG discharges are active, and ramp is stable. This can be verified by measuring the Vt-curve (K. Sakita, et al., SID2001; H. Kim, et. al., SID2001; S.T. de Zwart and B. Salters, IDW2001). Vt-curve is analog of the breakdown voltage in 1D case and 2 electrodes. It positions applied voltages with respect to discharge conditions inside the cell, since it shows where the balance between production of charged particles and their losses is. Vt-curve is analog of the breakdown voltage in 1D case and 2 electrodes. It positions applied voltages with respect to discharge conditions inside the cell, since it shows where the balance between production of charged particles and their losses is. It doesn’t tell, though, anything about the discharge, when one applies a vector V which takes the cell off the balance. It doesn’t tell, though, anything about the discharge, when one applies a vector V which takes the cell off the balance.

5. Plasma Dynamics Corp. Q1:Vt-curve – what it is and what it is not What it is: What it is: Vt-curve depends on the wall charge surface distribution, which is not uniform and depends on real parameters of a cell, discharge “history”, trajectory (V XY (t), V AY (t)) rather than final V XY, V AY  Vt-curve transforms (Figs. below)  it has to be measured in every “critical” operation-wise point (after sustain period, before and after ramps UP and Down, AFTER address discharge) otherwise actions one takes may have undesirable results. Vt-curve depends on the wall charge surface distribution, which is not uniform and depends on real parameters of a cell, discharge “history”, trajectory (V XY (t), V AY (t)) rather than final V XY, V AY  Vt-curve transforms (Figs. below)  it has to be measured in every “critical” operation-wise point (after sustain period, before and after ramps UP and Down, AFTER address discharge) otherwise actions one takes may have undesirable results. What it isn’t: What it isn’t: As in 1D case and 2 electrodes the knowledge of the breakdown voltage gives only the reference point for comparison with voltage across the gap, the Vt-curve serves only as a reference line for 3 electrode system, but it doesn’t give any information about the dynamics and the speed of the discharge. As in 1D case and 2 electrodes the knowledge of the breakdown voltage gives only the reference point for comparison with voltage across the gap, the Vt-curve serves only as a reference line for 3 electrode system, but it doesn’t give any information about the dynamics and the speed of the discharge. When Va is applied, the field lines reconnect and conditions in the gap change completely. For example V=(  V XY,  V A )=(10, 70) from SIP doesn’t mean V XY becomes 10V above the breakdown (next slide). When Va is applied, the field lines reconnect and conditions in the gap change completely. For example V=(  V XY,  V A )=(10, 70) from SIP doesn’t mean V XY becomes 10V above the breakdown (next slide).

6. Plasma Dynamics Corp. Q1: Field reconfiguration End of the ramp case 1 End of the ramp+Va(80V) case 1 End of the ramp case 2 End of the ramp+Va(90V) case 2

7. Plasma Dynamics Corp. Q1: Experiments with priming Va=80V case 1 (3D PIC/MC) After the ramp cell is emptied of all charges, address voltage applied and a weak source (~1e/  s) imitating exoemission is placed either near the inner edge or in the central part of the cathode. Emission from the edge does not produce self-sustaining discharge - it decays. Electron emitted in the center produced ~4.5 times stronger avalanche than from the edge, and then number of particles increases with characteristic time ~ 43ns by itself.

8. Plasma Dynamics Corp. Q1: Summary of how discharge works Details depend on geometry, but in any case address discharge comprises a few phases: Details depend on geometry, but in any case address discharge comprises a few phases: Priming – most likely by exoelectrons (unless external UV is present), and following amplification due to avalanches. Fast growing PG discharge – source of electrons for ALL other regions (due to electron diffusion), leading to growth of the ion/current density everywhere, as the source (PG discharge) grows. Spread of the PG discharge and creating the SG “field channel”. Depending on geometric parameters of the cell (SG vs. PG), SG channel may be created sooner or later than PG discharge peaks. In the latter case a strong PG discharge precedes SG discharge. Strong SG discharge. Decay of a plasma due to mostly recombination after SG discharge. It is SG discharge, which creates a large memory charge. Removing the scan voltage prior to plasma density decays will result in lowering memory charge and may be even secondary discharge, erasing it. It is SG discharge, which creates a large memory charge. Removing the scan voltage prior to plasma density decays will result in lowering memory charge and may be even secondary discharge, erasing it.

9. Plasma Dynamics Corp. Q2: Controls/limitations of the discharge speed? Priming (statistical phase) Priming (statistical phase) Both exoemission rate, structure and strength of PG field (Va). Stronger field, higher exoemission rate  shorter delay. PG discharge PG discharge Voltage across the gap, gap size (  ~L -2 ) Creating the SG channel Creating the SG channel Mostly geometrical factors and capacitance of the dielectric near address and sustain electrodes, Va. Channel can be created even at low Va, it will just take longer time, which makes the whole process analogous rather than digital. SG discharge SG discharge Speed-no problem. Decay (waste of time) Decay (waste of time) Mostly due to recombination. It requires ~0.5  s, otherwise the memory charge will be reduced. Memory charge depends on actual applied voltage. No control of the decay time.

10. Plasma Dynamics Corp. Alternatives How about addressing more than one line at a time, achieving fast speed for addressing a whole panel rather than a single line? How about addressing more than one line at a time, achieving fast speed for addressing a whole panel rather than a single line? Can we make addressing “digital”? Can we make addressing “digital”? What else can we do to accelerate addressing of a single line, using what we have learned about the discharge. What else can we do to accelerate addressing of a single line, using what we have learned about the discharge. Movies - courtesy of Kenn Melvin: ourworld.compuserve.com/homepages/kennmelvin

11. Plasma Dynamics Corp. Addressing the ON cells After SG discharge starts one can change the address voltage without any effect. The SG discharge IS a release button for the ON cells. After SG discharge starts one can change the address voltage without any effect. The SG discharge IS a release button for the ON cells. Memory charge differs by only 2% (actually better with the switch)  If the cell is addressed ON, then one can apply the scan voltage and address the next line right after start of the SG discharge without locking the line back, having large memory charge and not wasting time for the decay.

12. Plasma Dynamics Corp. Addressing the OFF cells One need to have PG discharge in OFF cells to prevent them from being addressed later on. One need to have PG discharge in OFF cells to prevent them from being addressed later on. One can use different modes of the PG discharge for OFF (weak) and ON (strong) discharges. One can use different modes of the PG discharge for OFF (weak) and ON (strong) discharges. OFF discharge being only PG discharge can be made fast if PG is short and voltage Va high. The higher voltage Va (while discharge is weak, and no SG channel formation) the better. OFF discharge being only PG discharge can be made fast if PG is short and voltage Va high. The higher voltage Va (while discharge is weak, and no SG channel formation) the better. Natural geometry – short PG (T~L 2 ), long SG  T OFF <T ON (=T scan,min ) Natural geometry – short PG (T~L 2 ), long SG  T OFF <T ON (=T scan,min )

13. Plasma Dynamics Corp. Dual Addressing, T OFF <T ON “Unlock the line”  “address ON and OFF”  “go to the next line” ( T addr =T OFF )

14. Plasma Dynamics Corp. Addressing: Short PG 1. End of the Ramp Setup2. Address voltage (60V) is applied 3. After OFF discharge (V OFF =50V) 4. Beginning of the ON discharge V ON =60V, t=335ns

15. Plasma Dynamics Corp. Parameters of the OFF discharge Parameter /V a 30V40V50V60V  V gap, V 6270102Break (ON)   , ns 270155118xx T(5000), ns895810747xx N i,max (10 5 )6.551527.9xx T tot, ns770680472xx

16. Plasma Dynamics Corp. Short PG – ON discharge V addr =10V (V ON =60V), First 335ns

17. Plasma Dynamics Corp. T OFF >T ON : Advantages of Dual Addressing T addr =T ON (=T scan,min ) Larger V OFF  Larger V OFF  Lower V addr (V addr =V ON -V OFF ), or Lower V addr (V addr =V ON -V OFF ), or higher possible V ON (combination of V OFF and common V’ addr ): V ON =V’ addr +V OFF higher possible V ON (combination of V OFF and common V’ addr ): V ON =V’ addr +V OFF

18. Plasma Dynamics Corp. Dual Addressing, T OFF >T ON “Unlock  address ON and OFF  lock  go to the next line” (T addr =T ON ) T OFF >T ON =T scan,min  PG is large, T addr =T ON, V addr =V ON - V OFF In addition to V OFF bias, one may decrease the voltage between sustain electrodes (V Xlock ) in order to obstruct the spread of the discharge across SG (better separate SG and PG discharges) and maximize V OFF. To maximize memory charge we choose V b,ramp higher than V b by V Xlock. This is not necessary, though.

19. Plasma Dynamics Corp. Summary Dual addressing with discharges in both ON and OFF cells has advantages, that come in one of three ways: Dual addressing with discharges in both ON and OFF cells has advantages, that come in one of three ways: If parameters of a PDP cell allow one to achieve a fast OFF discharge (T OFF <T ON =T scan,min ) then one can address the panel with T OFF per line, using “Unlock the line”  “address ON and OFF”  “go to the next line” scheme. If parameters of a PDP cell allow one to achieve a fast OFF discharge (T OFF <T ON =T scan,min ) then one can address the panel with T OFF per line, using “Unlock the line”  “address ON and OFF”  “go to the next line” scheme. If T OFF >T ON, then T addr =T ON, but one can either use a lower voltage for address drivers (V addr =V ON - V OFF ), or If T OFF >T ON, then T addr =T ON, but one can either use a lower voltage for address drivers (V addr =V ON - V OFF ), or Achieve a higher speed for the ON discharge and shorter T addr by combining conventional address drivers with large V OFF bias. Achieve a higher speed for the ON discharge and shorter T addr by combining conventional address drivers with large V OFF bias. In any case T addr is smaller of T ON and T OFF. In any case T addr is smaller of T ON and T OFF. In a cell with short PG we obtained addressing time of ~650ns with V addr =10V, V OFF =50V. In a cell with short PG we obtained addressing time of ~650ns with V addr =10V, V OFF =50V. In a cell with large PG (105-130um), T OFF > T ON  T addr =T ON, and with V Xlock ~30-40V we obtained V OFF >50V. In a cell with large PG (105-130um), T OFF > T ON  T addr =T ON, and with V Xlock ~30-40V we obtained V OFF >50V.