1. A PCI Card for Readout in High Energy Physics Experiments Michele Floris 1,2, Gianluca Usai 1,2, Davide Marras 2, André David 3 2003 IEEE Nuclear Science Symposium – October 19 -25 Portland, Oregon, USA 1) Dipartimento di Fisica, Università degli studi di Cagliari, Italy. 2) INFN, Sezione di Cagliari, Italy. 3) CERN, Geneva, Switzerland

2. October 19 - 25 20032003 IEEE NSS, Portland, Oregon, USA2 Outline ► Motivations and requirements ► Implementation ► Applications  NA60 DAQ ► Muon Spectrometer ► Quartz fiber Zero Degree Calorimeter ► Silicon strip Beam Tracker ► Silicon pixel Vertex Telescope  Alice Muon tracking chambers test system FLEXIBILITY

3. October 19 - 25 20032003 IEEE NSS, Portland, Oregon, USA3 Motivation & design requirements ► NA60 Experiment DAQ  Fast development ► NA60 is a running experiment  Flexibility ► Readout of 4 different detectors  Partitions Tracking MWPCs Trigger hodoscopes Toroidal Magnet Fe wall Muon filter ZDC and Quartz Blade TARGET AREA MUON SPECTROMETER ~1m MUON FILTER BEAM TRACKER TARGET BOX TELESCOPE Dipole field 2.5 T BEAM IC

4. October 19 - 25 20032003 IEEE NSS, Portland, Oregon, USA4 NA60 readout system ► NA60 readout is spill-buffered  DAQ handshake with readout system system DAQ PC MEZZANINEPCI Card DET NA60 DAQ scheme burst interburst burst events - trigger ► PCI based system:  Good performances / low cost  Readout of several different detectors ► General purpose PCI readout card ► Detector specific mezzanine

5. October 19 - 25 20032003 IEEE NSS, Portland, Oregon, USA5 The PCI-CFD Altera EP20K100, BGA package flexibility reliability PLX 9030 (PCI Target) Fast development Bandwidth: 30 MB/s PMC connectors (not fully compliant IEEE 1386.1) 64 MB SDRAM ~ 2 months from the first schematic to a working prototype to a working prototype Tristate buffer (JTAG input) PLX EEPROM 1-Wire Unique ID

6. October 19 - 25 20032003 IEEE NSS, Portland, Oregon, USA6 USER APPL. PCI interface RAM CTRL REGs PCI-CFD SDRAM PLX 9030 MEZZANINE Only these blocks change between different applications CTRL

7. October 19 - 25 20032003 IEEE NSS, Portland, Oregon, USA7 JTAG Configuration PLX CONN MEZZANINE CFD and mezzanine FPGAs can be JTAG programmed via PCI bus TRISTATE The PLX has some general purpose I/O, we used them to implement a JTAG interface The JTAG chain can be extended to the mezzanine, using a jumper A tristate buffer is used to multiplex JTAG inputs FPGA EPROM

8. October 19 - 25 20032003 IEEE NSS, Portland, Oregon, USA8 Software ► Linux software has been developed  PLX Eeprom programming  PCI JTAG configuration  Driver ► Sample code  PCI memory is seen as an “extension” of main memory! open (/dev/cfdX, “O_RDWR”); mmap (......, “REGISTERS/MEMORY”); memcpy (in, out, size); Interfacing with (DAQ) software is extremely easy!

9. October 19 - 25 20032003 IEEE NSS, Portland, Oregon, USA9 NA60 VME-like/FERA interfaces ► Very simple mezzanine  Level conversion ECL/NIM => TTL  Protocol itself implemented in PCI Card FPGA  R/O of 3 detectors implemented  2 different protocols (RMH/FERA) BURST BUSY TRIGGER Protocol control signals & data PCI Card trigger start_read encode dflag data end_of_read

10. GOL chiphybrid with assemblies NA60 Pixel readout ► Pixel detector  Almost 800k channels  Several configurable parameters ► Complex mezzanine  Readout control – zero suppression (FPGA)  Temporary data storage (FIFOs) See also N16-5 at this conference FIFoFIFo PCI-CFD PILOT chip

11. October 19 - 25 20032003 IEEE NSS, Portland, Oregon, USA11 NA60 Pixel readout – cont’d ► Serial link PCI-CFD => mez.  Detector & electronics configuration Command register Start register 101101110010 FIFO Output register

12. October 19 - 25 20032003 IEEE NSS, Portland, Oregon, USA12 Alice Test system ► 1 fully equipped slat chamber readout ► AD DSP emulation in FPGA ► Custom DAQ software See also N26-35 at this conference

13. October 19 - 25 20032003 IEEE NSS, Portland, Oregon, USA13 Conclusions ► PCI bus offers very attractive features  High Performances  Low cost  Easy interfacing with SW ► Using hardware cores PCI cards can be developed with little effort ► Flexibility:  FPGA  Mezzanines  Several different applications: ► VME-like, FERA interfaces ► Custom applications: pixel readout, DSP emulation