# Instructors: Fu-Chiung Cheng ( 鄭福炯 ) Associate Professor Computer Science & Engineering Tatung University.

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Instructors: Fu-Chiung Cheng ( 鄭福炯 ) cheng@cse.ttu.edu.tw http://www.cse.ttu.edu.tw/~cheng Associate Professor Computer Science & Engineering Tatung University Computer-Aided Circuit Design

Information: Office: A5-608A Tel. No: 25925252 Ext 3284 Email: cheng@cse.ttu.edu.tw Http://www.cse.ttu.edu.tw/~cheng Class Lecture will be available on line Textbook: The Designer’s Guide to VHDL Peter J. Asbenden (Morgan Kaufmann 2002) Reference books: VHDL: Analysis and Modeling of Digital Systems Navabi. (McGRAW-HILL 1998) VHDL for Logic Synthesis (Rushton. Wiley 1998)

Syllabus VHDL (VHSIC Hardware Description Language) A. standard IEEE VHDL-2001 hardware description language. ( Language Constructs) B. VHDL programs Circuits C. Altera/Xilinx CAD tools. Circuits Design: A. Combinational circuit design B. Sequential circuit design: Synchronous/Async sequential circuit design. C. SOC Design

Grading Homework Assignments: 35% (4 times). Midterm Exam: 25% Project: 35% A. Proposal. B. Design in VHDL C. Presentation D. Report. Attendance: 5%

Circuits: Review Circuit Combinational Circuit Sequential Circuit Synchronous Asynchronous

Combinational Circuits: Combinational circuits: The outputs of a system are independent of previous inputs. Examples: A. AND, OR, XOR, NOT, NAND … B. Multiplexer, Demultiplexer, Decoders, ROM,... C. Adder, Multipliers,... Methods to synthesize combinational circuits: A. Karnaugh maps B. Quine-McCluskey C. Boolean Algebra

Combinational Circuit: Name AND OR NOT NAND Symbol ABABAABABABAAB xxxxxxxx Function x=AB x=A+B x=A’ x=(AB)’

Combinational Circuits: 4 to 1 MUX Demux Decoder

Sequential Circuits Sequential circuits: The outputs of a system are dependent of previous inputs. Examples: A. Flip-Flops: SR F/F(latch), Trigger F/F(latch), JK clocked SR F/F, clocked JK F/F B. Counter, Shift Register, Methods to synthesize Sequential Circuits: A. Flow table( State machine)

SR Latch (Asynchronous) S R Q Q’

JK Latch(Asynchronous)

Clocked J-K F/F (Synchronous)

Asynchronous System Combinational Circuit... Latches...

Synchronous System Combinational Circuit... Clocked F/Fs... CK

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