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A 0.18µm High Dynamic Range NTSC/PAL Imaging SOC with Embedded Frame Buffer Adopted from paper in ISSCC2003 by: W. Bidermann, A. El Gamal*, S. Ewedemi,

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Presentation on theme: "A 0.18µm High Dynamic Range NTSC/PAL Imaging SOC with Embedded Frame Buffer Adopted from paper in ISSCC2003 by: W. Bidermann, A. El Gamal*, S. Ewedemi,"— Presentation transcript:

1 A 0.18µm High Dynamic Range NTSC/PAL Imaging SOC with Embedded Frame Buffer Adopted from paper in ISSCC2003 by: W. Bidermann, A. El Gamal*, S. Ewedemi, J. Reyneri, H. Tian, D. Wile, D. Yang ASIC Class presentation By: Mehdi Salmani 810182062 Spring 2004

2 Agenda  Introduction  Definitions  References

3 Introduction  The CMOS imaging system-on-chip includes an embedded frame buffer and operates at 100 MHz. The programmable chip produces color video at up to 500 frames/s with over 100 dB dynamic range using multi-capture. The sensor utilizes a 0.18 um 1 P 4 M CMOS process and dissipates 600 mW including I/O.

4 Definitions  Dynamic Range  LVDS

5 Dynamic Range  Some scenes contain very wide range of illumination with intensities varying over 100dB range or more  Biological vision systems and silver halide film can image such high dynamic range scenes with little loss of contrast information  Dynamic range of solid-state image sensors varies over wide range: high end CCDs > 78dB consumer grade CCDs 66dB consumer grade CMOS imagers 54dB  So, except for high end CCDs, image sensor dynamic range is not high enough to capture high dynamic range scenes

6 Dynamic Range 2  Dynamic range quantifies the ability of a sensor to adequately image both high lights and dark shadows in a scene  It is defined as the ratio of the largest nonsaturating input signal to the smallest detectable input signal

7 Multiple Capture Issue  Dual capture implementation not too difficult (plenty of time between the two captures to readout the first capture  Multiple capture implementation is quite difficult, needs: Very high speed non-destructive readout On-chip memory and some logic to perform reconstruction of HDR image during capture

8 LVDS  Low-voltage differential signaling (LVDS) as the name suggests is a differential Interconnectivity standard: low voltage swing of approximately 350 mV to communicate over a pair of traces on a PCB or cable. superior immunity to noise low power low cost

9 References  http://www.national.com/analogu/lvds, 4-June-2004.  “An Overview of LVDS Technology”, National Semiconductor, Application Note 971, Syed B. Huq, John Goldie, July 1998.  http://www.xilinx.com/esp/networks_telecom/optical/xlnx_net/lvds.h tm, 4-June-2004.  http://www-isl.stanford.edu/~abbas/group/, 4-June-2004.


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