Presentation is loading. Please wait.

Presentation is loading. Please wait.

BI-TB on BST Systems Introduction (L. Jensen) Hardware for SPS/LHC masters and receivers (old and new) (JJ. Savioz) Software for masters and receivers.

Published byOsborn Thornton Modified over 8 years ago

Similar presentations

Presentation on theme: "BI-TB on BST Systems Introduction (L. Jensen) Hardware for SPS/LHC masters and receivers (old and new) (JJ. Savioz) Software for masters and receivers."— Presentation transcript:

1 BI-TB on BST Systems Introduction (L. Jensen) Hardware for SPS/LHC masters and receivers (old and new) (JJ. Savioz) Software for masters and receivers (L. Jensen) BST systems used for LHC experiments (S. Baron/L. Jensen) RF signal distribution for SPS and LHC (W. Hofle) Consolidation ideas for the BST systems (J. Serrano) Beam synchronous signals for PS (H. Damerau) Conclusions and outlook (All) Lars K. Jensen1

2 Introduction Transmission of ‘hardware’ signals (Frev, 40MHz, pre-pulses) + message (LHC: 64 bytes / turn) Hardware consists of: – 3 central masters: SPS LHC Beam 1 LHC Beam 2 – BOBR receivers (+new VFC-based modules) Main use (BI): – Acquisition clocks and triggering + time- stamping of BI systems (“DAB64x”) through the BOBR receiver BPM, BLM, BRAN, BSRA, BSRT, BCTF.. LHC: presently have >130 BOBR devices Objectives for the meeting today: – Inform of what’s available today – Agree on responsibilities (present and future) – Discuss consolidation plans (SPS/LHC) – Details concerning PS BST (Heiko) Lars K. Jensen2

3 Master Message LHC Message: – http://bdidev1.cern.ch/bdisoft/operational/abbdisw _wiki/LHC/BST-config http://bdidev1.cern.ch/bdisoft/operational/abbdisw _wiki/LHC/BST-config EDMS document (2008): – https://edms.cern.ch/document/638899/2.0 https://edms.cern.ch/document/638899/2.0 Lars K. Jensen3

4 BI acquisition triggers (defined and used for BPM/BLM) Allow triggering all distributed systems within n*100ps for timing events on 1msec frame Lars K. Jensen4

5 Master software BST Master project started as collaboration in 2004 – P. Karlsson (BI), D. Dominguez (CO), J. Lewis (CO) VME hardware clone of “MTG” module -> “BST- CTG” (FPGA micro-controller) – Tasks with software written in assembler- language, compiled before download Global (GR) and per task registers (R) FESA (2.10) class and BST tasks developed and maintained by BI/SW – PPC4 OS - port to L865 will likely await 2014 Regular orbit-trigger every “GR11” msec Initialisation – wait for 1 PPS event Orbit on bit #2 of byte 9 Count-down Lars K. Jensen5

6 BOBR software BDI_BOBR hardware-type in CCDB Device driver for PPC4 and L865 based on ‘dgII’ Handling of two hardware-bytes sent on the BI-only Wiener-crates (P0 lines rows D/E) VME interrupts based on setup of message byte and bit masks FESA 2.10 class developed and maintained by BI/SW (ported to L865) Lars K. Jensen6

Download ppt "BI-TB on BST Systems Introduction (L. Jensen) Hardware for SPS/LHC masters and receivers (old and new) (JJ. Savioz) Software for masters and receivers."

Similar presentations

System Integration and Performance

System Integration and Performance
01/11/2002SNS Software Final Design Review1 V123S Event Link Encoder, Transmission System and PLL Receiver Thomas M. Kerner (BNL) SNS Global Controls.

01/11/2002SNS Software Final Design Review1 V123S Event Link Encoder, Transmission System and PLL Receiver Thomas M. Kerner (BNL) SNS Global Controls.
Dirk Zimoch, EPICS Collaboration Meeting, Vancouver 2009 Real-Time Data Transfer using the Timing System (Original slides and driver code by Babak Kalantari)

Dirk Zimoch, EPICS Collaboration Meeting, Vancouver 2009 Real-Time Data Transfer using the Timing System (Original slides and driver code by Babak Kalantari)
20 September 2000 LHC slow timing implementations brainstorming on slow timing Wednesday 20 September M.Jonker.

20 September 2000 LHC slow timing implementations brainstorming on slow timing Wednesday 20 September M.Jonker.
RPC Electronics Status Overall system TDC –Digitizing frequency issue (determine the bin size of the TDC value) Discriminator test result Trigger module.

RPC Electronics Status Overall system TDC –Digitizing frequency issue (determine the bin size of the TDC value) Discriminator test result Trigger module.
Technical review on UPS power distribution of the LHC Beam Dumping System (LBDS) Anastasia PATSOULI TE-ABT-EC Proposals for LBDS Powering Improvement 1.

Technical review on UPS power distribution of the LHC Beam Dumping System (LBDS) Anastasia PATSOULI TE-ABT-EC Proposals for LBDS Powering Improvement 1.
BI SW for LINAC4 On behalf of BE/BI/SW BI software development process Specifications List of BI Systems – Not covered: PSB ring systems Conclusions Lars.

BI SW for LINAC4 On behalf of BE/BI/SW BI software development process Specifications List of BI Systems – Not covered: PSB ring systems Conclusions Lars.
The TIMING System … …as used in the PS accelerators.

The TIMING System … …as used in the PS accelerators.
Updates on RF synchronization and fast trigger distribution A. Butterworth, H. Damerau, W. Hofle Acknowledgements: T. Bohl, S. Doebert, I. Kozsar, J. Molendijk,

Updates on RF synchronization and fast trigger distribution A. Butterworth, H. Damerau, W. Hofle Acknowledgements: T. Bohl, S. Doebert, I. Kozsar, J. Molendijk,
26 February 2009Dietrich Beck FPGA Solutions... FPGA and LabVIEW Pattern Generator Multi-Channel-Scaler.

26 February 2009Dietrich Beck FPGA Solutions... FPGA and LabVIEW Pattern Generator Multi-Channel-Scaler.
AWAKE RF Synchronization and LLRF Budget Review Reported by Wolfgang Hofle Acknowledgement: A. Butterworth, H. Damerau, S. Doebbert, J. Molendijk, S. Rey.

AWAKE RF Synchronization and LLRF Budget Review Reported by Wolfgang Hofle Acknowledgement: A. Butterworth, H. Damerau, S. Doebbert, J. Molendijk, S. Rey.
Stanford Linear Accelerator Center PowerPC and VXI Kinetic Systems V151 Embedded PowerPC Slot-0 Controller.

Stanford Linear Accelerator Center PowerPC and VXI Kinetic Systems V151 Embedded PowerPC Slot-0 Controller.
Stanford Linear Accelerator Center PowerPC and VXI Kinetic Systems V152 Embedded PowerPC Slot-0 Controller.

Stanford Linear Accelerator Center PowerPC and VXI Kinetic Systems V152 Embedded PowerPC Slot-0 Controller.
SNS Integrated Control System EPICS Collaboration Meeting SNS Machine Protection System SNS Timing System Coles Sibley 2000-0xxxx/vlb.

SNS Integrated Control System EPICS Collaboration Meeting SNS Machine Protection System SNS Timing System Coles Sibley xxxx/vlb.
Distribution of machine parameters over GMT in the PS, SPS and future machines J. Serrano, AB-CO-HT TC 6 December 2006.

Distribution of machine parameters over GMT in the PS, SPS and future machines J. Serrano, AB-CO-HT TC 6 December 2006.
LCLS Timing Software and Plan 1 Controls Timing Workshop EPICS Collaboration Meeting SLAC LCLS Timing Software and Plan April 24 2012 Kukhee Kim.

LCLS Timing Software and Plan 1 Controls Timing Workshop EPICS Collaboration Meeting SLAC LCLS Timing Software and Plan April Kukhee Kim.
Dayle Kotturi Lehman Review May 10-12, 2005 LCLS Timing Outline Scope SLC Master Pattern Generator Introducing the PNET VME receiver.

Dayle Kotturi Lehman Review May 10-12, 2005 LCLS Timing Outline Scope SLC Master Pattern Generator Introducing the PNET VME receiver.
EPICS Collaboration Meeting Fall PAL October 22 ~ 26, 2012 LCLS-I/LCLS-II Timing System Low Level Kukhee Kim for LCLS Timing Team ICD Software,

EPICS Collaboration Meeting Fall PAL October 22 ~ 26, 2012 LCLS-I/LCLS-II Timing System Low Level Kukhee Kim for LCLS Timing Team ICD Software,
BI day 2011 T Bogey CERN BE/BI. Overview to the TTpos system Proposed technical solution Performance of the system Lab test Beam test Planning for 2012.

BI day 2011 T Bogey CERN BE/BI. Overview to the TTpos system Proposed technical solution Performance of the system Lab test Beam test Planning for 2012.
1 Timo Korhonen PSI 1. Concepts revisited…again 3. New (Diamond) cards features and status 4. EPICS interface 5. Conclusions SLS & Diamond Timing System.

1 Timo Korhonen PSI 1. Concepts revisited…again 3. New (Diamond) cards features and status 4. EPICS interface 5. Conclusions SLS & Diamond Timing System.

Similar presentations

Ads by Google