1. BYU ECEn 320 Lab 4 UART Transmitter

2. BYU ECEn 320 UART Transmimtter Specification VGA Serial A1 Expansion Connector PS2 A2 Expansion Connector B1 Expansion Connector Power Send ASCII value on 8 toggle switches to serial port for display on screen when button 1 is pressed.

3. BYU ECEn 320 Top Level System Block Diagram Clock/Reset Generator Switch and Button Interface Button Debouncer tx_test tx Transmitter Two Entities: tx_test - top level file to test the transmitter tx - The transmitter itself, which is instantiated in the body of tx_test You will reuse the transmitter in a later lab 7 segment display ctrl

4. BYU ECEn 320 Transmitter Tester (tx_test) Block Diagram tx 8 data_in tx_out clk (50 MHz) rst tx_busy send_character Debounce Circuit button switch(7 downto 0) txd clk_in display cntrl signals

5. BYU ECEn 320 Transmitter (tx) Block Diagram FSM Shift Register Bit Timer 8 data_in tx_out clk rst clrTimer tx_bit shift clk rst clk rst tx_busy send_character load Transmit Out shift_out stop start

6. BYU ECEn 320 Bit Timer FSM Shift Register Bit Timer 8 data_in tx_out clk rst clrTimer tx_bit shift clk rst clk rst tx_busy send_character load Transmit Out shift_out stop start

7. BYU ECEn 320 Bit Timer - Transmitter Clocking Everything is clocked on same global clock (clk) Global clock is 50MHz The Bit Timer controls the timing of bits coming out of the serial port. Bit Timer needs to create timing pulse at rate of 19,200Hz –That is the baud rate of our serial port –Divide factor = 50,000,000/19,200 = 2604.1666… –We will use 2604 cycles/pulse

8. BYU ECEn 320 Transmitter Bit Timer Bit timer can be created from a counter –Can be cleared, otherwise increments up to 2603 and rolls over –Signal tx_bit is asserted during the last cycle (cycle 2603 in this case) clk tx_bit state serial_out 2604 cycles “one bit”

9. BYU ECEn 320 Building a Parameterizable Bit-Timer To make our transmitter more reusable, we will use generics for the clock rate and baud rate generic CLK_RATE : Natural := 50_000_000; generic BAUD_RATE : Natural := 19_200; generic BIT_TIMER_WIDTH : Natural := 12;. constant BIT_TIMER_COUNT : Natural := CLK_RATE/BAUD_RATE; signal BIT_TIMER : unsigned(BIT_TIMER_WIDTH-1 downto 0); Use the constant BIT_TIMER_COUNT in the design of your counter to determine when to return to 0 –Changes in generics will automatically result in changes to the counter

10. BYU ECEn 320 Shift Register FSM Shift Register Bit Timer 8 data_in tx_out clk rst clrTimer tx_bit shift clk rst clk rst tx_busy send_character load Transmit Out shift_out stop start

11. BYU ECEn 320 Shift Register A shift register is used to load the “parallel” data from the switches and “shift” the data out on the serial port –The “LSB” of the shift register drives the “shift_out” signal load: The shift register should load all data from the switches shift: The shift register should shift right

12. BYU ECEn 320 Transmit Out FSM Shift Register Bit Timer 8 data_in tx_out clk rst clrTimer tx_bit shift clk rst clk rst tx_busy send_character load Transmit Out shift_out stop start

13. BYU ECEn 320 Transmit Out Additional logic is needed to make sure the TX signal is valid and clean –Outputs a ‘0’ when start is high –Outputs a ‘1’ when stop is high –Outputs selected data bit from shift_out otherwise This signal should be registered in a flip-flop to prevent glitches before leaving the chip –The Flip-Flop will remove any transient glitches.

14. BYU ECEn 320 Transmitter FSM FSM Shift Register Bit Timer 8 data_in tx_out clk rst clrTimer tx_bit shift clk rst clk rst tx_busy send_character load Transmit Out shift_out stop start

15. BYU ECEn 320 Transmitter FSM Controls the operation of all elements in the transmitter –Controls clearing of Bit timer –Controls loading and shifting of shift register –Controls transmit out (start bit, stop bit, or shift bit) Inputs: –send_character:Control signal to initiate transfer –tx_bit:Indicates the end of a bit time Outputs: –tx_busy:Transmitter is busy (middle of transmit) –clrTimer:Clear the bit timer –load:Load switch data into shift register –shift:Shift shift register –stop:Send a stop bit –start:Send a start bit

16. BYU ECEn 320 Transmitter State Diagram (Transitions) STRT RETRN send_character tx_bit send_character tx_bit IDLE send_character STP tx_bit rst B0 tx_bit B1 tx_bit B2 tx_bit B3 tx_bit B4 tx_bit B5 tx_bit B6 tx_bit B7 tx_bit See following two pages for a description of the states and the state machine outputs

17. BYU ECEn 320 Transmitter FSM States IDLE:Waiting for signal to start transmit STRT:Issue start bit B0-B7:Send a bit (B0 = send bit 0, etc.) STP:Send stop bit RETRN:Wait for “send_character” to clear

18. BYU ECEn 320 Transmitter FSM Outputs tx_busy: –true when not in IDLE state load: –Occurs on transition from IDLE state to STRT state –STATE = IDLE and (send_character = ‘1’) shift: –Occurs on each transition between B x and B x+1 –tx_bit = ‘1’ and (STATE = B0 or STATE = B1... or STATE = B7) stop: –True when in STP, RETRN, and IDLE state –Transmitter must drive a ‘1’ when IDLE (i.e. a STOP bit) start: –True in STRT state clrTimer: –True in IDLE state (the counter is free running otherwise)

19. BYU ECEn 320 Signal Debouncing

20. BYU ECEn 320 Signal Bouncing The buttons will “bounce” many times each time the button is pressed –Pressing the button generates a very noisy analog signal –The corresponding digital signal will transition many times until the button settles Additional circuitry must be added to “debounce” the button –If this bounce is not removed, one press of the “send character” button will result in many distinct send character signals –You will see many characters send to the PC You must add a debouncing circuit to this signal

21. BYU ECEn 320 Button Debounce Circuit Debounce Logic A digital equivalent of a low pass filter switch settle time button settle time is typically around 10 msec button input output

22. BYU ECEn 320 Debounce Circuit T sample > T settle D Q bouncydebounc ed en Timer/Clock Divider T settle T sample bouncy debounced clk en_sample

23. BYU ECEn 320 Debounce Circuit You can create a debouncer by “sampling” the input signal infrequently (~10 ms?) –Create a counter to measure the delay time –Sample the input signal every time the counter rolls over You should make the delay parameterizable (with generics) so you can adjust the debounce time