1. Module 8 Part B Adapted By and Prepared James Tan © 2001

2. Objectives In this lecture we will be looking at stuff mentioned in Module 8: Computer Block Diagram Semi-conductor RAM, ROM, EPROM Alternative Memory System: Magnetic, Optical, and bubble memory devices.. Basic Operation of CPU..

3. 8.1 Introduction Page 8.1 in text book: –Basic Block Diagram of a computer system 8.1.2Input Devices 8.1.3Output Devices 8.1.4Memory Unit See Diagram on page 8.2 Each location has some fixed number of cells, each cell store one bit. One byte (8 bits) has two nibbles (4 bits). Understand the use of address decoder

4. 8.1.5 Practical Memory System  Each Cell = a flip flop 2 Basic Type: –Random Access (Any locations can be reached at the same time) –Limited Access (Due to mechanical read/write head movement) –What is a Volatile Memory? Example: Flip Flop: Power Off  Lost of data RAM = made up of many flip flop So, is RAM a volatile memory?

5. 8.1.6 Non Flip Flop Memory Examples: –ROM:Read Only Memory –EPROM: Erasable Programmable ROM To program a logic 1, a voltage is applied and the charge remains there as there is no discharge path. How can you do this? Consider the analogy circuit: Vin

6. 8.2 Alternative Memory System 8.2.1 Magnetic Disks –Flexible Diskette –Hard Disks 8.2.2 Magnetic Tapes 8.2.3 Optical Storage

7. 8.3 The CPU Control Unit Operate by : –1. Fetch Instruction from memory –2. Decode the instruction –3. Execute Instruction –4. Store the result in memory CPU has: –ALU: Does Add, Subtract, And, OR. –Registers: Temporary Storage Areas –Accumulator (ACC): most important and used for all operations.

8. CPU CPU handles binary information –In 8, 16 or 32, 64 bits. –MC6802 is an 8-bit Micro-processor Typical instructions are: –Add, subtract, load, store and branch –Usually abbreviated by 3 letters mnemonics: ADD, SUB, LDA, STA, BRA

9. 8.3.2 The Instruction Set How to develop assembly program? –Understand Problem –Develop Flow Chart Solution –Translate flow-chart to assembly program is MC6802 –Store the program in memory.

10. Typical Assembly Instruction NameMnemonicOPCODE (HEX) Description ADD 9BACC  (OPERAND’S ADDRESS)+ACC SUBTRACTSUB90ACC  ACC-(OPERAND’S ADDRESS) Load the Accumulator LDA96ACC  (OPERAND’S ADDRESS) Store the AccSTA97? BranchBRA30? Branch is Minus BRI31? HALTHLT3F? NO OperationNOP?

11. 8.3.3 Instruction Content Lengthy CPU instruction can easily occupy 51 bits each. [see page 8.11 for detail] We will reduce instruction length by: –Add new hardware in the CPU. This reduces flexibility and limits the operation of each instruction. –Add further instructions to compensate. Example: –Add a ‘Program Counter’ register to point to the next instruction address.

12. 8.3.3 Example (cont) We can also reduce instruction length by making one of the operand address as the result address. A = A + B This reduces the need for ‘Result Address’. We can further embed only 2 bits within the instruction for specifying one of the 4 working registers.

13. Example of use of short instruction 3 short Instructions is needed to perform A + B = C Note: This was previously done with one long 51-bit instruction. LDA B- put B in the Accumulator ADD A- (accumulator + A)  accumulator STA C- store accumulator into C Acc is very important, its major uses: –Used in All ALU operations and store ALU results. –For transferring data between the CPU and I/O devices, and I/O of memory.

14. Modern Trend To limit each instruction to 8 bit Store the instruction over more than one location Example: –8 Bits OPCODE FieldRegister FieldAddress Mode Field OPERAND Address Field

15. Structure of an Elementary CPU The Program Counter –Supplies the address of next instruction Status Register C- if a carry was generated V- if a 2’s complement overflow occurred Z- if the result was zero N- if the result was negative ALU –For arithmetic and logic function. Accumulator –It holds one of the operand in an ALU operation and it holds the result following the ALU operation.

16. Structure of an Elementary CPU (Cont) Data Register –Also known as ‘data buffer’, ‘data buffer register’ –Act as a buffer between Data Bus and the CPU. Address Register –Also known as ‘Memory Address Register’ –Act as a buffer to hold the address supplied by the the CPU. Instruction Decoder/Controller Sequencer –Also known as Control Unit. –Decides what need to be performed and supplies all gating and control signals to execute the instruction..

17. 8.4 Program Example Problem: Evaluate 9 – 5 + 8.1 Flow chart (Page 8.17) Program Development LOC 00 =09 LOC 01=05 LOC 02=02 LDA (00)- put content of loc 00 in the Accumulator SUB (01)- (Acc – content of loc 01)  Acc ADD (02) - (Acc + content of loc 02)  Acc HLT

18. End of Lecture