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Published byViolet Chase Modified over 8 years ago
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Heterogeneous Chip Multiprocessor Design for Virtual Machines Dan Upton and Kim Hazelwood University of Virginia
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Pairing CMPs and VMs Challenge for chip multiprocessors: exploiting all available thread-level parallelism Challenge for virtual machines: reducing overhead Our solution: moving the VM to a separate core – only give a VM core what the VM needs
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Heterogeneous Chip Multiprocessors Applications have different needs –Ex: Cache performance, available ILP Heterogeneous CMPs can be used to meet design constraints –Ex: Size, power, cost
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Virtual machines Many practical applications –Dynamic translation (legacy ISA support) –Security –Instrumentation –… HW OS AppVM App HW VM OS App Process VMs (Ex: Pin, JVM, Rosetta)System VMs (Ex: Xen, Transmeta)
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Design Approach Characterize a VM’s microarchitectural performance Examine processor organization options Consider beneficial modifcations for support SimpleScalar-x86 Pin Application
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Two Examples Comparison of branch behavior against benchmarks from SPECINT 2000 Comparison of cache performance Other experiments in paper
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Example: Branch Prediction
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Example: L1 Caches
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Example: L2 Cache
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Design Options Two basic classes: General Purpose 1 General Purpose 2 VM (other specialized) General Purpose VM General Purpose VM General Purpose VM General Purpose VM
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Support Structures Application Core VM Core where to compile where to resume executing support for indirect branches Support for tasks normally handled in software
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Related Work Hardware support for VMs (Trident, DAISY, Kim and Smith) Transmeta Java in hardware (picoJava, JOP)
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Work in Progress Comparing similarity of Pin to other VM software Characterizing VM compilation, cache management
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