1. Lecture 11: TI MSP430 Timers Compare Modes
ECE 447 Fall 2009
Lecture 11: TI MSP430
Timers Compare Modes

2. ECE447: MSP430 Output: Continuous Mode
In the continuous mode, the timer repeatedly counts up to 0FFFFh and restarts from zero as shown in the figure.
The number of timer counts in the period is 0xFFFF + 1
The capture/compare register TACCR0 works the same way as the other capture/compare registers.

3. ECE447: MSP430 Output: Up Mode
The timer repeatedly counts up to the value of compare register TACCR0, which defines the period, as shown in the figure.
The number of timer counts in the period is TACCR0+1.
When the timer value equals TACCR0 the timer restarts counting from zero.

4. ECE447: MSP430 Output: Up/Down Mode
The timer repeatedly counts up to the value of compare register TACCR0 and back down to zero, as shown in the figure.
The period is twice the value in TACCR0.

5. ECE 447: Generating a Periodic Signal
Each time an interval is completed, an interrupt is generated. The next time interval is added to the TACCRx register in the interrupt service routine.

6. ECE 447: Designing a PWM single pulse periodical signal pulse width

7. ECE 447: Code Example Review Davies example Listing 8.10 which:
Toggles TA1 with a period of 0.5s, duty cycle 50%, connected to LED1
Set/reset TA2 at 100Hz with a 10% duty cycle. Connected to LED2
Drives a 440Hz wave output to piezo sounder through the Timer_A0 ISR
Toggles the 440Hz wave on and off every 2s using enabling and disabling of an appropriate interrupt.

8. Listing 8.10: Illustrating Periodic Outputs from Timer_A
// #include <io430x11x1.h> // Specific device #include <intrinsics.h> // Intrinsic functions // Delays in cycles of timer clock = ACLK = 32KHz = 0x8000Hz #define LED1half 0x2000 // (1/4)s half -period for toggling #define LED2duty 30 // Duration of "on" duty cycle #define LED2period 300 // Total period #define PIEZhalf 37 // Toggle piezo to give f = 440Hz nearly void main (void) { WDTCTL = WDTPW | WDTHOLD; // Stop watchdog timer // Channel 0 of timer , interrupts only to drive piezo TACCR0 = PIEZhalf; // "Compare" value for first interrupt TACCTL0 = CCIE; // Enable interrupts only (no output) // Channel 1 of timer , drive LED1 (P2.3) in toggle mode with interrupts TACCR1 = LED1half; // Compare value for first interrupt TACCTL1 = OUTMOD_4 | CCIE; // Toggle mode with interrupts // Channel 2 of timer , drive LED2 (P2.4) with set , reset and interrupts TACCR2 = LED2duty; // Compare value for first interrupt TACCTL2 = OUTMOD_1 | CCIE; // "Set" to turn LED off at next match // Configure ports 1 and 2; redirect P2.3,4 to Timer_A P1OUT = BIT0 | BIT1; // Output , high for Freq pin and TXD P1DIR = BIT0 | BIT1; P2SEL = BIT3 | BIT4; // Re -route P2.3 to TA1 , P2.4 to TA2 P2OUT = BIT0 | BIT3 | BIT4; // LEDs off (active low); prepare piezo P2DIR = BIT0 | BIT3 | BIT4 | BIT5; // Piezo and LED outputs // Start timer from ACLK , Continuous mode , clear , TAIFG interrupts TACTL = TASSEL_1 | ID_0 | MC_2 | TACLR | TAIE; for (;;) { // Loop forever __low_power_mode_3 (); // LPM3 , all action in interrupts }

9. Listing 8.10: Cont’d with ISRs
// // Interrupt service routine for TACCR0.CCIFG , called on compare #pragma vector = TIMERA0_VECTOR __interrupt void TIMERA0_ISR (void) // Flag cleared automatically { P2OUT ˆ= (BIT0|BIT5); // Toggle piezo sounder TACCR0 += PIEZhalf; // Calculate next compare value } // Interrupt service routine for TACCRn.CCIFG (n > 0) and TAIFG #pragma vector = TIMERA1_VECTOR __interrupt void TIMERA1_ISR (void) // ISR for TACCRn CCIFG and TAIFG switch (__even_in_range(TAIV , 10)) { // Acknowledges interrupt case 0: // No interrupt pending break; // No action case TAIV_CCIFG1: // Vector 2: CCIFG1 TACCR1 += LED1half; // Calculate next compare value break; // (LED1 toggled automatically) case TAIV_CCIFG2: // Vector 4: CCIFG2 if (TACCTL2 & OUTMOD_5) { // Was last action Reset (on)? TACCR2 += LED2duty; // Duration of On part of cycle TACCTL2 = OUTMOD_1 | CCIE; // "Set" turns LED off next } else { // Last action was Set (off) TACCR2 += (LED2period - LED2duty ); // Duration of Off part TACCTL2 = OUTMOD_5 | CCIE; // "Reset" turns LED on next break; case TAIV_TAIFG: // Vector A: TAIFG TACCTL0_bit.CCIE ˆ= 1; // Toggle CCIFG0 ints (piezo on/off) default: // Should not be possible for (;;) {} // Disaster! Loop here for ever

10. TACTL: Timer_A Control Register

11. TACCTLx: Capture/Compare Control Register

12. ECE447: MSP430 Timer_B additional features
Timer_B is identical to Timer_A with the following exceptions:
The length of Timer_B is programmable to be 8, 10, 12, or 16 bits.
Timer_B TBCCRx registers are double-buffered and can be grouped.
All Timer_B outputs can be put into a high-impedance state.
The SCCI bit function is not implemented in Timer_B.

13. ECE447: MSP430 Class Exercise
Write a Function that sets up Timer_B in Up Mode to generate a 1000Hz output wave. The duty cycle of the wave will be determined by the value read on PORT1. The value should be interpreted as unsigned and any value over 100 will be treated with a ceiling at As the input on Port1 changes the PWM duty cycle will be adjusted.