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Hyper Transport (HT3.0) 2.6GHz(CPU頻率)*2(上下觸發)*2(雙向)*32bit(16bit up +16bit down)/8=41.6GB/s 200MHz(基頻)*2(兩組CLK)*2(上下觸發)=800MHz 800MHz*64bit(64根Data,1根1bit)/8=6400MB/s=6.4GB/s.

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Presentation on theme: "Hyper Transport (HT3.0) 2.6GHz(CPU頻率)*2(上下觸發)*2(雙向)*32bit(16bit up +16bit down)/8=41.6GB/s 200MHz(基頻)*2(兩組CLK)*2(上下觸發)=800MHz 800MHz*64bit(64根Data,1根1bit)/8=6400MB/s=6.4GB/s."— Presentation transcript:

1 Hyper Transport (HT3.0) 2.6GHz(CPU頻率)*2(上下觸發)*2(雙向)*32bit(16bit up bit down)/8=41.6GB/s 200MHz(基頻)*2(兩組CLK)*2(上下觸發)=800MHz 800MHz*64bit(64根Data,1根1bit)/8=6400MB/s=6.4GB/s A-Link 2.5Gb/s*4=10Gb/s=1GB/s (除以10的原因是原本的8位元再加上2個偵錯位元) PCI-E每一對的頻寬為2.5Gb/s=250MB/s SATA2頻寬為3Gb/s=300MB/s USB2.0最大頻寬為480MB/s

2 Dolomites Power ON/RESET Sequence
5V_AUX_S5 3D3V_AUX_S5 5 AD+ DCBATOUT DDR_VREF_S3 0D9V_S3 Adapter In -6 -5 5V_S5 TPS51125 RT9026 -7 PM_SLP_S5# VLDOIN/ VDDQSNS 3D3V_AUX_S5 -5 8 3D3V_AUX_S5 4 1D8V_S0 5V_S5 1D8V_S3 -1 RSMRST#_KBC KBC WPC775 1D8V_S3 ECRST# 3D3V_S5 5V_S5 N-MOS -3 RT8202 PM_PWRBTN# 2 KBC_PWRBTN# EN/DEM DCBATOUT S5_ENABLE TPS51125 PM_SLP_S5# 6 3V/5V_EN 1 3D3V_S0 3D3V_S5 EN1 EN2 -4 5V_S0 3V/5V_EN -4 3V/5V_EN 6 5V_S5 11 PM_SLP_S5# 3 3.1 10 1D1V_S0 PM_SLP_S3# 3D3V_S5 5V_S5 2 SLP_S5# SLP_S3# 1D2V_S0 RSMRST# PGOOD PM_PWRBTN# 5V_S5 PWR_BTN# RT8202 1D1V_PWRGD PGOOD SB700 EN/DEM RTC_AUX_S5 18 RT8202 1D2V_PWRGD VBAT A_RST# KBC WPC775 VCORE_EN EN/DEM RTC 9 PWRGOOD LDT_STP# LDT_RST# LDT_PG LAN BCM5764 -2 1D2V_S5 5V_S0 PLT_RST1# 3D3V_S5 1D1V_PWRGD PM_SLP_S3# 3D3V_S5 RESET# AND AND G9161 SB_PWRGD Buffer G792 TPS2231 New Card RUNPWROK RUNPWROK_D 14 13 7 2D5V_S0 240ms after Mini Card VCC_G792>4.38V CPU_LDT_RST# CPU_PWRGD 1D8V_S3 CPU_LDT_STOP# 3D3V_S0 LPC Debug BD RT9161 N-MOS 12 17 18 VCC_CORE_S0_0/1 VDDNB 16 19 7 1D5V_S0 PM_SLP_S3# SYSRESET# RS780M 3D3V_S0 AND VCORE_EN ENABLE NB_PWRGD G957 LDTSTOP_ L RESET_ L PWROK 2D5V_S0 9 ISL6265HR POWERGOOD Griffin 15

3 Dolomites Power Budget
DDRII 1D8V_S3(5000mA) 0D9V_S3(1200mA) BIOS ROM 30mA KBC Winbond WPC775L 3D3V_AUX_S5(170mA) KBC EV BD USB*3 2000mA MDC 40mA BCM5764 3D3V_LAN_S5(190mA) VCC_CORE_S0 36000mA VCC_CORE_S0 0D9V_S3 1950mA 0D9V_S3 1D1V_S0 8900mA 1D1V_S0 1D2V_S0 3875mA 1D2V_S0 1D2V_S5 310mA 1D2V_S5 DCBATOUT DCBATOUT 1D8V_S0 720mA 1D8V_S0 1D8V_S3 8000mA 1D8V_S3 2D5V_S0 250mA 2D5V_S0 3D3V_S5 1472mA 3D3V_S5 5V_S5 2000mA 5V_S5 VDDNB 3000mA VDDNB 1D2V_S0(PCIE_I/O,PCIE_PVDD,ATA_I/O,ATA_PLL,SB_CORE)(1875mA) 1D2V_S5 (USB CORE,1.2_S5_PW)(310mA) 3D3V_S5(USB I/O,3.3V_S5_PW)(712mA) 3D3V_S0(PCI/GPIO)(250mA) 5V_S0(VREF)(1mA) SB700 RS780M 1D1V_S0(VDDHTRX,VDDHT,VDDPCIE,VDDC,PLLs)(8900mA) 1D2V_S0(VDDHTTX)(500mA) 1D8V_S0(VDDA18,VDD18_MEM,VDD_MEM,VDDLT18,PLLs)(720mA) 3D3V_S0(VDDG33,AVDD,VDDLT33)(165mA) S1G2 VCC_CORE_S0(CORE0 & CORE1)(36A) VDDNB(Memory&Controller)(3000mA) 0D9V_S3(VTT)(750mA) 1D2V_S0(VLDT)(1500mA) 1D8V_S3(VDDIO)(3000mA) 2D5V_S0(VDDA)(250mA) 4610 mA 3D3V_S0 MS Card 200 mA SD Card LCD 500mA CLK GEN ICS9LPRS480 750mA Mini card 802.11/BT 1500mA LPCROM 6mA CODEC 3.3V(35mA) 5V(55mA) Express CARD 1000mA 4381 mA 5V_S0 FAN 500mA CRT 500mA HDD 1500mA CD ROM 1300mA AMP 2057 500mA TOUCHPAD 25mA

4 Dolomites POWER BLOCK DIAGRAM
DC Jack: 19V / 3.42A ISL6265HR AD+ DCBATOUT VCC_CORE_S0_0/1(36A) VDDNB(3000mA) BT+ Battery Conn.:11.1V / 4000mAh TPS51125 5V_S5(2000mA) AO4468 5V_S0(5206mA) 3D3V_S5(1472mA) AO4468 3D3V_S0(3787mA) 5V_AUX_S5(175mA) 2D5V_S0(250mA) RT9161 3D3V_AUX_S5(175mA) 1D5V_S0(1000mA) G957 AD+ MAX8731AETI RT8202 1D8V_S3(8000mA) 1D8V_S0(720mA) APM2300 RT9026 0D9V_S3(1950mA) G9161 1D2V_S5(310mA) BT+ 1D2V_S0(3875mA) RT8202 1D1V_S0(8900mA) RT8202

5 Dolomites Clock Block Diagram
RTC 32.768kHz Crystal 25MHz Crystal MHz SB700 X1/X2 SATA_X1/X2 X1/X2 CPU_CLK CPU Griffin CPUKG0T_LPRS CLKIN_H MEM_MA_CLK0_P DDR2 NORMAL TYPE DIMM1 CPUKG0C_LPRS CPU_CLK# MEM_MA_CLK0_N CLK48_USB CLKIN_L MEM_MA_CLK1_P USBCLK 48MHz_0 CLK_PCIE_SB MEM_MA_CLK1_N PCIE_RCLKP SRC0T_LPRS CLK_PCIE_SB# PCIE_RCLKN SRC0C_LPRS SMBC0_SB MEM_MB_CLK0_P DDR2 NORMAL TYPE DIMM2 SCA0 SMBCLK MEM_MB_CLK0_N SMBD0_SB MEM_MB_CLK1_P SDL0 SMBDAT MEM_MB_CLK1_N L0_CLKOUT L0_CLKIN LPCCLK1 HDA_BIT-CLK ACZ_BTCLK_MDC HT_CPU_NB_CLK HT_NB_CPU_CLK CLKGEN PCLK_KBC MDC ACZ_BITCLK HT_RXCLK HT_TXCLK RS780M CLK_NBHT_CLK CODEC ALC268 HTT0T_LPRS KBC WPC775 HT_REFCLKP Crystal 32.768KHz CLK_NBHT_CLK# HTT0C_LPRS HT_REFCLKN CLK_NB_14M REF0 REFCLK_P CLK_PCIE_LAN CLK_NB_GPPSB LAN BCM5764 SRC1T_LPRS SRC2T_LPRS Crystal 25MHz GPPSB_REFCLKP CLK_NB_GPPSB# SRC2C_LPRS GPPSB_REFCLKN CLK_PCIE_LAN# SRC1C_LPRS CLK_PCIE_MINI1 MINI CARD SRC3T_LPRS CLK_PCIE_MINI1# SRC3C_LPRS CLK_PCIE_NEW NEW CARD SRC4T_LPRS CLK_PCIE_NEW# SRC4C_LPRS ICS9LPRS480

6 Dolomites Audio Block Diagram
KBC WPC775 KBC_BEEP SB700 ACZ_SPKR AUDIO_BEEP CODEC ALC268 PCBEEP AUD_MICIN_R MIC1_R AUD_MICIN_L Mic-In MIC1_L ACZ_SDATAIN ACZ FRONTR SPKR_L+1 HP_OUT_R Audio AMP. APA2057ARI H.P. Jack Line Out FRONTL SPKR_R+1 HP_OUT_L SPKR_R+ SOUNDR LINE_OUT_R SPKR_R- 1 Watt SPKR_L+ SOUNDL LINE_OUT_L SPKR_L- 1 Watt MDC CON.

7 Dolomites SMB Interface
3D3V_S5 3D3V_S0 4k7 R 4k7 R SB700 SMBC0_SB SMBD0_SB SMB_CLK SMB_DATA 0R 33R 33R DY DY DDR2 DIMM1 DDR2 DIMM2 CLK GEN ICS9LPRS480 LAN New Card Mini Card 3D3V_S0 10KR SMBC_G792 Thermal 3D3V_AUX_S5 SMBD_G792 KBC WPC775 G792 4K7R 33R BAT_SCL Battery CONNECTOR BAT_SDA CHARGER MAX8731

8 Dolomites SMB Interface
SMbus 是由兩條訊號所組成的一種匯流排. 是為了在系統上較慢速的裝置及電源管理裝置之間的溝通使用. 使系統可取得這些裝置的製造廠商,型號,一些控制資訊,錯誤訊息及狀態. 這兩條訊號為 SMBCLK 和 SMBDATA. 這和 I2C 上的 Clock(SCL) 和 Data(SDA) 是一樣的. 在 SMbus 上只有一個 Master. 所有的命令均有此 Master 發出. 其他的裝置 (Slave) 只能接收 Master 發出的命令或回覆資料給 Master. 3D3V_S0 3D3V_S0 5V_S0 2K2R 10KR CLK_DDC1_5 GMCH_DDCCLK CRT GMCH_DDCDATA DAT_DDC1_5 3D3V_S0 RS780M 4K7R LCD CLK_DDC_EDID DAT_DDC_EDID 當 SCL 為 High 而 SDA 由 High 變 Low 時表示開始一個 SMbus 的命令 當 SCL 為 High 而 SDA 由 Low 變 High 時表示結束一個 SMbus 的命令 這二個狀況在 Smbus 裡是唯一的. 在一般傳送資料時均不可能發生 而在一般傳送資料時則是在每一次 SCL 的上升緣時的 SDA 狀態來決定. 這些資料包含了仲裁,確認,送出資料給那一個裝置及送出的資料.或要取得那一個裝置的資料及由裝置送出的資料.

9 Dolomites SMI/SCI/SWI Interface
SMI在DOS底下動作 SCI在windows底下動作 SWI是指wake up event Dolomites SMI/SCI/SWI Interface LPC BUS SB700 SPI KBC WPC775 FWH AC_Link HDA_SDOUT ACZ_SDATAOUT ECSCI#_1 ECSCI# LPC_PME#/GEVENT3# PM_SLP_S3# MDC CODEC ALC268 GPIO01 ACZ_SDATAIN1 ECSWI# HDA_SDIN1 PWUREQ# USB_OC6#/IR_TX1 HDA_SDIN0 ACZ_SDATAIN0 LID_CLOSE# GPIO07 RSMRST#_KBC AC_IN# GPIO06 RSMRST# AD_OFF PM_PWRBTN# GPIO42 GPIO43 PWRBTN# BAT_IN# GPIO41 GPIO03 GPIO20 LAN BCM5764 KBC_PWRBTN# ECSMI#_KBC PCIE_WAKE# WAKE#/GEVENT8# DY 0R 10K NEW CARD 3D3V_S0 Power Switch Block From S3 state wakeup event: (1) Power Button; (2) WOL ( AC Only ); (3) Embedded Modem ( AC Only ) ;(4) RTC; (5) Lid; (6) Battery Critical

10 Dolomites VCC_CORE Block Diagram
DCBATOUT VCC_CORE_S0_0/1 UGATE0 UGATE0 CPU_VDDNB_RUN_FB_H VCC_CORE_S0_0 VSEN_NB VDDNB_FB_H PHASE0 CPU_VDDNB_RUN_FB_L PHASE0 RTN_NB VDDNB_FB_L BOOT0 BOOT0 CPU_VDD0_RUN_FB_H LGATE0 VSEN0 VDD0_FB_H LGATE0 CPU_VDD0_RUN_FB_L RTN0 VDD0_FB_L CPU CPU_VDD1_RUN_FB_H ISP0 ISP0 VSEN1 VDD1_FB_H Griffin CPU_VDD1_RUN_FB_L ISN0 Positive Input of the Output Current Sense RTN1 VDD1_FB_L Negative Input of the Output Current Sense ISN0 相差180度 CPU_PWRGD_SVID_REG PWROK PWROK DCBATOUT CPU_SVD SVD SVD CPU_SVC SVC UGATE1 SVC UGATE1 VCC_CORE_S0_1 PHASE1 PHASE1 1D2V_S0 BOOT1 BOOT1 Sense電阻 LGATE1 VCORE_EN LGATE1 RT8202 ENABLE ISP1 ISP1 濾波電容 1D1V_S0 ISN1 ISN1 RT8202 PWRGD DCBATOUT 補償用 DPRSTP# UGATE_NB UGATE_NB VDDNB BOOT_NB BOOT_NB LGATE_NB LGATENB ISL6265HR


Download ppt "Hyper Transport (HT3.0) 2.6GHz(CPU頻率)*2(上下觸發)*2(雙向)*32bit(16bit up +16bit down)/8=41.6GB/s 200MHz(基頻)*2(兩組CLK)*2(上下觸發)=800MHz 800MHz*64bit(64根Data,1根1bit)/8=6400MB/s=6.4GB/s."

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