1. Memory Layout and SLC500™ System Addresses

2. Processor Memory Division An SLC 500 processor's memory is divided into two storage areas. Like two drawers in a filing cabinet, one area is for data files and the other for program files. Processor memory division and file capacity are shown in the following graphic: An SLC 500 processor's memory is divided into two storage areas. Like two drawers in a filing cabinet, one area is for data files and the other for program files. Processor memory division and file capacity are shown in the following graphic:

4. Program Files Program files contain processor information, the main ladder program, and other ladder files. An SLC 500 processor can contain up to 256 program files. Program files are located in the Program Files folder of the RSLogix 500 project tree, as shown in the following graphic: Program files contain processor information, the main ladder program, and other ladder files. An SLC 500 processor can contain up to 256 program files. Program files are located in the Program Files folder of the RSLogix 500 project tree, as shown in the following graphic:

6. Program files are assigned as follows: Program files are assigned as follows: File 0 always contains system information. File 0 always contains system information. File 1 is reserved. File 1 is reserved. File 2 contains the main ladder file. File 2 contains the main ladder file. File 3-255 contains other ladder files (subroutines). File 3-255 contains other ladder files (subroutines).

7. Data Files Data files contain the status information associated with external I/O and all other instructions used in the main and subroutine ladder program files. Data files are located in the Data Files folder of the RSLogix 500 project tree, as shown in the following graphic: Data files contain the status information associated with external I/O and all other instructions used in the main and subroutine ladder program files. Data files are located in the Data Files folder of the RSLogix 500 project tree, as shown in the following graphic:

9. Data files are assigned as follows: Data files are assigned as follows: File O0 stores the state of output terminals. File O0 stores the state of output terminals. File II stores the state of input terminals. File II stores the state of input terminals. File S2 stores processor operation data. File S2 stores processor operation data. File B3 stores internal relay logic. File B3 stores internal relay logic. File T4 stores the timer accumulator and preset values and status bits. File T4 stores the timer accumulator and preset values and status bits. File C5 stores the counter accumulator and preset values and status bits. File C5 stores the counter accumulator and preset values and status bits. File R6 stores the length, pointer position, and status bits for specific instructions such as shift registers. File R6 stores the length, pointer position, and status bits for specific instructions such as shift registers. File N7 stores whole number values, both negative and positive or bit-level information. File N7 stores whole number values, both negative and positive or bit-level information. File F8 stores positive and negative numbers that include a decimal point., File F8 stores positive and negative numbers that include a decimal point., Files 9-255 store user-defined data. Files 9-255 store user-defined data.

10. SLC 500 Processor Data Storage Units: The SLC 500 processor stores data in the following units of memory: The SLC 500 processor stores data in the following units of memory: Bit: A digit in the binary radix (0 or 1). A bit may represent the state, on or off, of a discrete I/O device. Bit: A digit in the binary radix (0 or 1). A bit may represent the state, on or off, of a discrete I/O device. Word: A sequence of 16 bits that is treated as a unit. For example, the 16 bits representing the 16 points of an I/O module comprise one word. Word: A sequence of 16 bits that is treated as a unit. For example, the 16 bits representing the 16 points of an I/O module comprise one word. Element: A word or group of words that work together as a unit. Element: A word or group of words that work together as a unit. Sub-element: Individual words within an element. Type: A group of words or elements with a common usage Sub-element: Individual words within an element. Type: A group of words or elements with a common usage File: A consecutive array of words addressable as a unit. File: A consecutive array of words addressable as a unit.

11. SLC 500 Software Address Characteristics: SLC 500 software addresses (internal storage addresses) are used for processor and program control. A software address is a value stored within a processor's data file that is not directly connected to real-world inputs or outputs. SLC 500 software addresses (internal storage addresses) are used for processor and program control. A software address is a value stored within a processor's data file that is not directly connected to real-world inputs or outputs. The following SLC 500 software address format is used for bits stored in status, binary, timer, counter, control, integer and floating point data table files: The following SLC 500 software address format is used for bits stored in status, binary, timer, counter, control, integer and floating point data table files:

12. SLC 500 Hardware Address Characteristics: The address for a real-world device (input or output) is directly determined by the module slot number and terminal to which the hardware device is wired. The address for a real-world device (input or output) is directly determined by the module slot number and terminal to which the hardware device is wired. Slot numbers are assigned from left to right, beginning with 0. The SLC 500 processor is in slot 0. Slot numbers are assigned from left to right, beginning with 0. The SLC 500 processor is in slot 0. A hardware address contains the following information: A hardware address contains the following information: The module type, either an input (I) or an output (O) module The module type, either an input (I) or an output (O) module The slot number (numbered in decimal from 1 to 30) The slot number (numbered in decimal from 1 to 30) The terminal number (numbered in decimal from 0 to 15) The terminal number (numbered in decimal from 0 to 15)

13. I/O Addresses: The input and output data tables store the states of input and output devices. The two files have the following characteristics: The input and output data tables store the states of input and output devices. The two files have the following characteristics: Each I/O module terminal point is represented by a bit stored in either the input or output data tables. Each I/O module terminal point is represented by a bit stored in either the input or output data tables. The bits in the input data table store data from input modules; bits in the output data table store data going to the output modules. The bits in the input data table store data from input modules; bits in the output data table store data going to the output modules. If a bit has a value of 1, it means the terminal point it represents is "on." If a bit has a value of 0, it means the terminal point it represents is "off." If a bit has a value of 1, it means the terminal point it represents is "on." If a bit has a value of 0, it means the terminal point it represents is "off."

15. The following graphic illustrates the relationship between a 16-point input module and the input data table: For modules with more than 16 terminal points, a ".1" is added to the slot number column of the data table to indicate the row containing terminals 16 and beyond.

16. Determine SLC 500 Hardware Addresses: The following graphic shows an SLC 500 hardware address for terminal number 10 of an input module in slot 3. In the example, note the position and order of the module type, slot number, and terminal number: The following graphic shows an SLC 500 hardware address for terminal number 10 of an input module in slot 3. In the example, note the position and order of the module type, slot number, and terminal number:

18. Example of Input addressing

19. Example of Output addressing

20. Example of I/O addressing

21. Example of Output addressing

22. Determine SLC 500 Software Addresses: The following graphic shows an SLC 500 software address for the 2nd bit in the 3rd word in binary file 15. In the example, note the position and order of the file type, file number, word or element, and bit number: The following graphic shows an SLC 500 software address for the 2nd bit in the 3rd word in binary file 15. In the example, note the position and order of the file type, file number, word or element, and bit number:

23. Example of Bit addressing

24. PLC programming Language LD, Ladder Diagram LD, Ladder Diagram SFC, Sequential Function Chart SFC, Sequential Function Chart IL, Instruction List IL, Instruction List FBD, Function Block Diagram FBD, Function Block Diagram ST, Structured Text ST, Structured Text

25. SLC 500 Processor Operating Cycle

26. Event in Operating Cycle Input Scan Input Scan Program Scan Program Scan Output Scan Output Scan Communications Communications Processor Overhead Processor Overhead

27. Drafting RLL

28. The status of each input module is read, and the input image table in the processor is updated with the information. The status of each input module is read, and the input image table in the processor is updated with the information. The ladder program is executed. The input image table is evaluated to see which conditions are met. Resulting information is written to the output table; however, no information is transferred to the output module until all rungs have been read. The output image table information is transferred to the output module affecting real-world outputs. The ladder program is executed. The input image table is evaluated to see which conditions are met. Resulting information is written to the output table; however, no information is transferred to the output module until all rungs have been read. The output image table information is transferred to the output module affecting real-world outputs. Communications with computer and other network devices takes place. Communications with computer and other network devices takes place. Internal housekeeping in the processor takes place, including updates of the status file and internal time base. Internal housekeeping in the processor takes place, including updates of the status file and internal time base. Important: Important: Data concerning outputs is only written to the data table during the program scan. Outputs are not actually updated until the output scan. Data concerning outputs is only written to the data table during the program scan. Outputs are not actually updated until the output scan.

29. Ladder Logic Ladder Logic: User-programmed instructions designed to perform decision-making and computational functions based on data gathered from inputs. Ladder Logic: User-programmed instructions designed to perform decision-making and computational functions based on data gathered from inputs. These user-programmed instructions rely on certain structural elements to organize the decision-making and computational processes. These organizational elements include: These user-programmed instructions rely on certain structural elements to organize the decision-making and computational processes. These organizational elements include:. Rungs. Instructions. Branches Although ladder logic is based on electrical diagrams and symbols, it actually shows the flow of logic. Although ladder logic is based on electrical diagrams and symbols, it actually shows the flow of logic.

30. Ladder Logic

31. Electromechanical Relay Ladder Diagram

32. Drafting Ladder Logic

34. Branches When placing branches in ladder logic, keep these key points in mind: When placing branches in ladder logic, keep these key points in mind: Branches are read from left to right, top to bottom. Branches are read from left to right, top to bottom. A branch can be used to create a different path for reading inputs. A branch can be used to create a different path for reading inputs. A branch can be used to program multiple outputs. A branch can be used to program multiple outputs. A branch must start and end on the same level. A branch must start and end on the same level. A parallel branch has the same start and same end point as the A parallel branch has the same start and same end point as the branch it is below: branch it is below: Parallel branches are evaluated faster than nested branches. The number of parallel branches is limited by the processor memory. Parallel branches are evaluated faster than nested branches. The number of parallel branches is limited by the processor memory. A nested branch starts and ends inside the same branch. A nested branch starts and ends inside the same branch. Nested branches are limited to four Nested branches are limited to four

40. AND with OR logic

41. Outputs

42. Last Rung Rule When programming an output on more than one rung, be careful tokeep the following rule in mind: When programming an output on more than one rung, be careful tokeep the following rule in mind: Data concerning the state of an output is written to the data table after rungs are evaluated. However, the actual outputs are not updated until the output scan. Because of this, the last state of the output in the data table will be the state of the output. Data concerning the state of an output is written to the data table after rungs are evaluated. However, the actual outputs are not updated until the output scan. Because of this, the last state of the output in the data table will be the state of the output.

43. Output Multiple Outputs Multiple Outputs If one condition determines one or more outputs, do not program them on separate rungs. Use parallel branches to program multiple outputs as shown in the following example: If one condition determines one or more outputs, do not program them on separate rungs. Use parallel branches to program multiple outputs as shown in the following example:

45. Outputs that Require Separate Inputs: If outputs share common inputs, enter the common inputs once. Use a branch to place any additional condition(s):

46. Example Both outputs require instruction A and B to be true; however, the Both outputs require instruction A and B to be true; however, the path to output Y also requires instruction C to be true. path to output Y also requires instruction C to be true.

47. Example of sealing circuit (logic) When A and B are true, the rung is true. Once the rung is true, it When A and B are true, the rung is true. Once the rung is true, it will remain true until condition B goes false and breaks the seal. will remain true until condition B goes false and breaks the seal. This type of seal-in logic is used often in programming. For example, if a momentary push button is used to turn X on, X will remain on even if the operator releases the push button. This type of seal-in logic is used often in programming. For example, if a momentary push button is used to turn X on, X will remain on even if the operator releases the push button.

48. General Tips for Drafting Ladder Logic Ladder logic rarely goes directly from the programmer's head to the computer without causing rework. Try to write out your ladder logic first. Ladder logic rarely goes directly from the programmer's head to the computer without causing rework. Try to write out your ladder logic first.

49. Examples X = A(BC+D)E

51. X=Y=ABC

52. X =(AB+D)C

53. X=A+BC Y=(A+BC)D

54. X=(A+B+C+D)(E+F)

55. X=(A+C)B

58. Examples 1. Conditions A or B or C or D, and E or F turn on output X. 2. Condition A and condition B, or state of output X, and condition B, turns on output X. 3. Condition A turns on output X. Conditions A and B and C and D turn on output Y. Conditions A and B, and E turn on output Z. 4. Conditions A and B and C, or D and B and C, or E and F, turn on output X.

59. Efficient Instruction Arrangement on Rungs and Branches Rule: When the processor encounters a false instruction on a rung, it Rule: When the processor encounters a false instruction on a rung, it stops scanning the rung and moves to the next rung of logic: stops scanning the rung and moves to the next rung of logic: For best performance: Sequence series instructions from the most likely to be false (at left) to least likely to be false (at right). For best performance: Sequence series instructions from the most likely to be false (at left) to least likely to be false (at right).

60. Efficient Arrangement of Multiple Branches Rule: As soon as the processor finds a true path, it will stop Rule: As soon as the processor finds a true path, it will stop scanning and will not read any remaining branches: scanning and will not read any remaining branches: For best performance: If your rung contains parallel branches, place the path that is most often true on the top. For best performance: If your rung contains parallel branches, place the path that is most often true on the top.